/* see pci-ids.txt */#definePCI_VENDOR_ID_REDHAT_QUMRANET0x1af4#definePCI_SUBVENDOR_ID_REDHAT_QUMRANET0x1af4#definePCI_SUBDEVICE_ID_QEMU0x1100#definePCI_DEVICE_ID_VIRTIO_NET0x1000#definePCI_DEVICE_ID_VIRTIO_BLOCK0x1001#definePCI_DEVICE_ID_VIRTIO_BALLOON0x1002
typedefvoidPCIConfigWriteFunc(PCIDevice*pci_dev,uint32_taddress,uint32_tdata,intlen);typedefuint32_tPCIConfigReadFunc(PCIDevice*pci_dev,uint32_taddress,intlen);typedefvoidPCIMapIORegionFunc(PCIDevice*pci_dev,intregion_num,uint32_taddr,uint32_tsize,inttype);#definePCI_ADDRESS_SPACE_MEM0x00#definePCI_ADDRESS_SPACE_IO0x01#definePCI_ADDRESS_SPACE_MEM_PREFETCH0x08typedefstructPCIIORegion{uint32_taddr;/* current PCI mapping address. -1 means not mapped */uint32_tsize;uint8_ttype;PCIMapIORegionFunc*map_func;}PCIIORegion;#definePCI_ROM_SLOT6#definePCI_NUM_REGIONS7#definePCI_DEVICES_MAX64#definePCI_VENDOR_ID0x00/* 16 bits */#definePCI_DEVICE_ID0x02/* 16 bits */#definePCI_COMMAND0x04/* 16 bits */#definePCI_COMMAND_IO0x1/* Enable response in I/O space */#definePCI_COMMAND_MEMORY0x2/* Enable response in Memory space */
#definePCI_INTERRUPT_LINE0x3c/* 8 bits */#definePCI_INTERRUPT_PIN0x3d/* 8 bits */#definePCI_MIN_GNT0x3e/* 8 bits */#definePCI_MAX_LAT0x3f/* 8 bits */structPCIDevice{/* PCI config space */uint8_tconfig[256];/* the following fields are read only */PCIBus*bus;intdevfn;charname[64];PCIIORegionio_regions[PCI_NUM_REGIONS];/* do not access the following fields */PCIConfigReadFunc*config_read;PCIConfigWriteFunc*config_write;/* ??? This is a PC-specific hack, and should be removed. */intirq_index;/* IRQ objects for the INTA-INTD pins. */qemu_irq*irq;/* Current IRQ levels. Used internally by the generic PCI code. */intirq_state[4];};PCIDevice*pci_register_device(PCIBus*bus,constchar*name,intinstance_size,intdevfn,PCIConfigReadFunc*config_read,PCIConfigWriteFunc*config_write);voidpci_register_io_region(PCIDevice*pci_dev,intregion_num,uint32_tsize,inttype,PCIMapIORegionFunc*map_func);uint32_tpci_default_read_config(PCIDevice*d,uint32_taddress,intlen);voidpci_default_write_config(PCIDevice*d,uint32_taddress,uint32_tval,intlen);voidpci_device_save(PCIDevice*s,QEMUFile*f);intpci_device_load(PCIDevice*s,QEMUFile*f);typedefvoid(*pci_set_irq_fn)(qemu_irq*pic,intirq_num,intlevel);typedefint(*pci_map_irq_fn)(PCIDevice*pci_dev,intirq_num);PCIBus*pci_register_bus(pci_set_irq_fnset_irq,pci_map_irq_fnmap_irq,qemu_irq*pic,intdevfn_min,intnirq);voidpci_nic_init(PCIBus*bus,NICInfo*nd,intdevfn);voidpci_data_write(void*opaque,uint32_taddr,uint32_tval,intlen);uint32_tpci_data_read(void*opaque,uint32_taddr,intlen);intpci_bus_num(PCIBus*s);voidpci_for_each_device(intbus_num,void(*fn)(PCIDevice*d));voidpci_info(void);PCIBus*pci_bridge_init(PCIBus*bus,intdevfn,uint32_tid,pci_map_irq_fnmap_irq,constchar*name);/* lsi53c895a.c */