#defineOMAP_INT_GAUGE_32K24#defineOMAP_INT_RTC_TIMER25#defineOMAP_INT_RTC_ALARM26#defineOMAP_INT_DSP_MMU28/**OMAP-1510specificIRQnumbersforlevel2interrupthandler*/#defineOMAP_INT_1510_BT_MCSI1TX16#defineOMAP_INT_1510_BT_MCSI1RX17#defineOMAP_INT_1510_SoSSI_MATCH19#defineOMAP_INT_1510_MEM_STICK27#defineOMAP_INT_1510_COM_SPI_RO31/**OMAP-310specificIRQnumbersforlevel2interrupthandler*/#defineOMAP_INT_310_FAC0#defineOMAP_INT_310_USB_HHC_27#defineOMAP_INT_310_MCSI1_FE16#defineOMAP_INT_310_MCSI2_FE17#defineOMAP_INT_310_USB_W2FC_ISO29#defineOMAP_INT_310_USB_W2FC_NON_ISO30#defineOMAP_INT_310_McBSP2RX_OF31/**OMAP-1610specificIRQnumbersforlevel2interrupthandler*/#defineOMAP_INT_1610_FAC0#defineOMAP_INT_1610_USB_HHC_27#defineOMAP_INT_1610_USB_OTG8#defineOMAP_INT_1610_SoSSI9#defineOMAP_INT_1610_BT_MCSI1TX16#defineOMAP_INT_1610_BT_MCSI1RX17#defineOMAP_INT_1610_SoSSI_MATCH19#defineOMAP_INT_1610_MEM_STICK27#defineOMAP_INT_1610_McBSP2RX_OF31#defineOMAP_INT_1610_STI32#defineOMAP_INT_1610_STI_WAKEUP33#defineOMAP_INT_1610_GPTIMER334#defineOMAP_INT_1610_GPTIMER435#defineOMAP_INT_1610_GPTIMER536#defineOMAP_INT_1610_GPTIMER637#defineOMAP_INT_1610_GPTIMER738#defineOMAP_INT_1610_GPTIMER839#defineOMAP_INT_1610_GPIO_BANK240#defineOMAP_INT_1610_GPIO_BANK341#defineOMAP_INT_1610_MMC242#defineOMAP_INT_1610_CF43#defineOMAP_INT_1610_WAKE_UP_REQ46#defineOMAP_INT_1610_GPIO_BANK448#defineOMAP_INT_1610_SPI49#defineOMAP_INT_1610_DMA_CH653#defineOMAP_INT_1610_DMA_CH754#defineOMAP_INT_1610_DMA_CH855#defineOMAP_INT_1610_DMA_CH956#defineOMAP_INT_1610_DMA_CH1057#defineOMAP_INT_1610_DMA_CH1158#defineOMAP_INT_1610_DMA_CH1259#defineOMAP_INT_1610_DMA_CH1360#defineOMAP_INT_1610_DMA_CH1461#defineOMAP_INT_1610_DMA_CH1562#defineOMAP_INT_1610_NAND63/**OMAP-730specificIRQnumbersforlevel2interrupthandler*/#defineOMAP_INT_730_HW_ERRORS0#defineOMAP_INT_730_NFIQ_PWR_FAIL1#defineOMAP_INT_730_CFCD2#defineOMAP_INT_730_CFIREQ3#defineOMAP_INT_730_I2C4#defineOMAP_INT_730_PCC5#defineOMAP_INT_730_MPU_EXT_NIRQ6#defineOMAP_INT_730_SPI_100K_17#defineOMAP_INT_730_SYREN_SPI8#defineOMAP_INT_730_VLYNQ9#defineOMAP_INT_730_GPIO_BANK410#defineOMAP_INT_730_McBSP1TX11#defineOMAP_INT_730_McBSP1RX12#defineOMAP_INT_730_McBSP1RX_OF13#defineOMAP_INT_730_UART_MODEM_IRDA_214#defineOMAP_INT_730_UART_MODEM_115#defineOMAP_INT_730_MCSI16#defineOMAP_INT_730_uWireTX17#defineOMAP_INT_730_uWireRX18#defineOMAP_INT_730_SMC_CD19#defineOMAP_INT_730_SMC_IREQ20#defineOMAP_INT_730_HDQ_1WIRE21#defineOMAP_INT_730_TIMER32K22#defineOMAP_INT_730_MMC_SDIO23#defineOMAP_INT_730_UPLD24#defineOMAP_INT_730_USB_HHC_127#defineOMAP_INT_730_USB_HHC_228#defineOMAP_INT_730_USB_GENI29#defineOMAP_INT_730_USB_OTG30#defineOMAP_INT_730_CAMERA_IF31#defineOMAP_INT_730_RNG32#defineOMAP_INT_730_DUAL_MODE_TIMER33#defineOMAP_INT_730_DBB_RF_EN34#defineOMAP_INT_730_MPUIO_KEYPAD35#defineOMAP_INT_730_SHA1_MD536#defineOMAP_INT_730_SPI_100K_237#defineOMAP_INT_730_RNG_IDLE38#defineOMAP_INT_730_MPUIO39#defineOMAP_INT_730_LLPC_LCD_CTRL_OFF40#defineOMAP_INT_730_LLPC_OE_FALLING41#defineOMAP_INT_730_LLPC_OE_RISING42#defineOMAP_INT_730_LLPC_VSYNC43#defineOMAP_INT_730_WAKE_UP_REQ46#defineOMAP_INT_730_DMA_CH653#defineOMAP_INT_730_DMA_CH754#defineOMAP_INT_730_DMA_CH855#defineOMAP_INT_730_DMA_CH956#defineOMAP_INT_730_DMA_CH1057#defineOMAP_INT_730_DMA_CH1158#defineOMAP_INT_730_DMA_CH1259#defineOMAP_INT_730_DMA_CH1360#defineOMAP_INT_730_DMA_CH1461#defineOMAP_INT_730_DMA_CH1562#defineOMAP_INT_730_NAND63/**OMAP-24xxcommonIRQnumbers*/#defineOMAP_INT_24XX_SYS_NIRQ7#defineOMAP_INT_24XX_SDMA_IRQ012#defineOMAP_INT_24XX_SDMA_IRQ113#defineOMAP_INT_24XX_SDMA_IRQ214#defineOMAP_INT_24XX_SDMA_IRQ315#defineOMAP_INT_24XX_CAM_IRQ24#defineOMAP_INT_24XX_DSS_IRQ25#defineOMAP_INT_24XX_MAIL_U0_MPU26#defineOMAP_INT_24XX_DSP_UMA27#defineOMAP_INT_24XX_DSP_MMU28#defineOMAP_INT_24XX_GPIO_BANK129#defineOMAP_INT_24XX_GPIO_BANK230#defineOMAP_INT_24XX_GPIO_BANK331#defineOMAP_INT_24XX_GPIO_BANK432#defineOMAP_INT_24XX_GPIO_BANK533#defineOMAP_INT_24XX_MAIL_U3_MPU34#defineOMAP_INT_24XX_GPTIMER137#defineOMAP_INT_24XX_GPTIMER238#defineOMAP_INT_24XX_GPTIMER339#defineOMAP_INT_24XX_GPTIMER440#defineOMAP_INT_24XX_GPTIMER541#defineOMAP_INT_24XX_GPTIMER642#defineOMAP_INT_24XX_GPTIMER743#defineOMAP_INT_24XX_GPTIMER844#defineOMAP_INT_24XX_GPTIMER945#defineOMAP_INT_24XX_GPTIMER1046#defineOMAP_INT_24XX_GPTIMER1147#defineOMAP_INT_24XX_GPTIMER1248#defineOMAP_INT_24XX_MCBSP1_IRQ_TX59#defineOMAP_INT_24XX_MCBSP1_IRQ_RX60#defineOMAP_INT_24XX_MCBSP2_IRQ_TX62#defineOMAP_INT_24XX_MCBSP2_IRQ_RX63#defineOMAP_INT_24XX_UART1_IRQ72#defineOMAP_INT_24XX_UART2_IRQ73#defineOMAP_INT_24XX_UART3_IRQ74#defineOMAP_INT_24XX_USB_IRQ_GEN75#defineOMAP_INT_24XX_USB_IRQ_NISO76#defineOMAP_INT_24XX_USB_IRQ_ISO77#defineOMAP_INT_24XX_USB_IRQ_HGEN78#defineOMAP_INT_24XX_USB_IRQ_HSOF79#defineOMAP_INT_24XX_USB_IRQ_OTG80#defineOMAP_INT_24XX_MMC_IRQ83#defineOMAP_INT_243X_HS_USB_MC92#defineOMAP_INT_243X_HS_USB_DMA93#defineOMAP_INT_243X_CARKIT94structomap_dma_s;structomap_dma_s*omap_dma_init(target_phys_addr_tbase,qemu_irqpic[],structomap_mpu_state_s*mpu,omap_clkclk);enumomap_dma_port{emiff=0,emifs,imif,tipb,local,tipb_mpui,omap_dma_port_last,};structomap_dma_lcd_channel_s{enumomap_dma_portsrc;target_phys_addr_tsrc_f1_top;target_phys_addr_tsrc_f1_bottom;target_phys_addr_tsrc_f2_top;target_phys_addr_tsrc_f2_bottom;/* Destination port is fixed. */intinterrupts;intcondition;intdual;intcurrent_frame;ram_addr_tphys_framebuffer[2];qemu_irqirq;structomap_mpu_state_s*mpu;};/**DMArequestnumbersforOMAP1*See/usr/include/asm-arm/arch-omap/dma.hinLinux.*/#defineOMAP_DMA_NO_DEVICE0#defineOMAP_DMA_MCSI1_TX1#defineOMAP_DMA_MCSI1_RX2#defineOMAP_DMA_I2C_RX3#defineOMAP_DMA_I2C_TX4#defineOMAP_DMA_EXT_NDMA_REQ05#defineOMAP_DMA_EXT_NDMA_REQ16#defineOMAP_DMA_UWIRE_TX7#defineOMAP_DMA_MCBSP1_TX8#defineOMAP_DMA_MCBSP1_RX9#defineOMAP_DMA_MCBSP3_TX10#defineOMAP_DMA_MCBSP3_RX11#defineOMAP_DMA_UART1_TX12#defineOMAP_DMA_UART1_RX13#defineOMAP_DMA_UART2_TX14#defineOMAP_DMA_UART2_RX15#defineOMAP_DMA_MCBSP2_TX16#defineOMAP_DMA_MCBSP2_RX17#defineOMAP_DMA_UART3_TX18#defineOMAP_DMA_UART3_RX19#defineOMAP_DMA_CAMERA_IF_RX20#defineOMAP_DMA_MMC_TX21#defineOMAP_DMA_MMC_RX22#defineOMAP_DMA_NAND23/* Not in OMAP310 */#defineOMAP_DMA_IRQ_LCD_LINE24/* Not in OMAP310 */#defineOMAP_DMA_MEMORY_STICK25/* Not in OMAP310 */#defineOMAP_DMA_USB_W2FC_RX026#defineOMAP_DMA_USB_W2FC_RX127#defineOMAP_DMA_USB_W2FC_RX228#defineOMAP_DMA_USB_W2FC_TX029#defineOMAP_DMA_USB_W2FC_TX130#defineOMAP_DMA_USB_W2FC_TX231/* These are only for 1610 */#defineOMAP_DMA_CRYPTO_DES_IN32#defineOMAP_DMA_SPI_TX33#defineOMAP_DMA_SPI_RX34#defineOMAP_DMA_CRYPTO_HASH35#defineOMAP_DMA_CCP_ATTN36#defineOMAP_DMA_CCP_FIFO_NOT_EMPTY37#defineOMAP_DMA_CMT_APE_TX_CHAN_038#defineOMAP_DMA_CMT_APE_RV_CHAN_039#defineOMAP_DMA_CMT_APE_TX_CHAN_140#defineOMAP_DMA_CMT_APE_RV_CHAN_141#defineOMAP_DMA_CMT_APE_TX_CHAN_242#defineOMAP_DMA_CMT_APE_RV_CHAN_243#defineOMAP_DMA_CMT_APE_TX_CHAN_344#defineOMAP_DMA_CMT_APE_RV_CHAN_345#defineOMAP_DMA_CMT_APE_TX_CHAN_446#defineOMAP_DMA_CMT_APE_RV_CHAN_447#defineOMAP_DMA_CMT_APE_TX_CHAN_548#defineOMAP_DMA_CMT_APE_RV_CHAN_549#defineOMAP_DMA_CMT_APE_TX_CHAN_650#defineOMAP_DMA_CMT_APE_RV_CHAN_651#defineOMAP_DMA_CMT_APE_TX_CHAN_752#defineOMAP_DMA_CMT_APE_RV_CHAN_753#defineOMAP_DMA_MMC2_TX54#defineOMAP_DMA_MMC2_RX55#defineOMAP_DMA_CRYPTO_DES_OUT56structomap_mpu_timer_s;structomap_mpu_timer_s*omap_mpu_timer_init(target_phys_addr_tbase,qemu_irqirq,omap_clkclk);structomap_watchdog_timer_s;structomap_watchdog_timer_s*omap_wd_timer_init(target_phys_addr_tbase,qemu_irqirq,omap_clkclk);structomap_32khz_timer_s;structomap_32khz_timer_s*omap_os_timer_init(target_phys_addr_tbase,qemu_irqirq,omap_clkclk);structomap_tipb_bridge_s;structomap_tipb_bridge_s*omap_tipb_bridge_init(target_phys_addr_tbase,qemu_irqabort_irq,omap_clkclk);structomap_uart_s;structomap_uart_s*omap_uart_init(target_phys_addr_tbase,qemu_irqirq,omap_clkclk,CharDriverState*chr);/* omap_lcdc.c */structomap_lcd_panel_s;voidomap_lcdc_reset(structomap_lcd_panel_s*s);structomap_lcd_panel_s*omap_lcdc_init(target_phys_addr_tbase,qemu_irqirq,structomap_dma_lcd_channel_s*dma,DisplayState*ds,ram_addr_timif_base,ram_addr_temiff_base,omap_clkclk);