gwj / at91sam9263 · Commits

Commit 88103cfecf5666237fb2e55a7dd666fa66d316ec

Authored by blueswir1
1 parent c2c73b42

Update i386-dis.c from commits before GPLv3 switch 

Update i386-dis.c again using binutils files from CVS:
include/opcode/i386.h r1.78 and opcodes/i386-dis.c r1.126.

These are the last versions using GPL v2+.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6744 c046a42c-6fe2-441c-8c8c-71466251a162
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i386-dis.c
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  1 +/* opcodes/i386-dis.c r1.126 */
1 2 /* Print i386 instructions for GDB, the GNU debugger.
2 3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3   - 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
  4 + 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
4 5  
5 6 This file is part of GDB.
6 7  
... ... @@ -33,18 +34,129 @@
33 34  
34 35 #include <stdlib.h>
35 36 #include "dis-asm.h"
36   -#include "qemu-common.h"
  37 +/* include/opcode/i386.h r1.78 */
37 38  
38   -#define MAXLEN 15
  39 +/* opcode/i386.h -- Intel 80386 opcode macros
  40 + Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
  41 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
  42 + Free Software Foundation, Inc.
39 43  
40   -#include <setjmp.h>
  44 + This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
  45 +
  46 + This program is free software; you can redistribute it and/or modify
  47 + it under the terms of the GNU General Public License as published by
  48 + the Free Software Foundation; either version 2 of the License, or
  49 + (at your option) any later version.
  50 +
  51 + This program is distributed in the hope that it will be useful,
  52 + but WITHOUT ANY WARRANTY; without even the implied warranty of
  53 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  54 + GNU General Public License for more details.
41 55  
42   -#ifndef UNIXWARE_COMPAT
  56 + You should have received a copy of the GNU General Public License
  57 + along with this program; if not, write to the Free Software
  58 + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
  59 +
  60 +/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
  61 + ix86 Unix assemblers, generate floating point instructions with
  62 + reversed source and destination registers in certain cases.
  63 + Unfortunately, gcc and possibly many other programs use this
  64 + reversed syntax, so we're stuck with it.
  65 +
  66 + eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
  67 + `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
  68 + the expected st(3) = st(3) - st
  69 +
  70 + This happens with all the non-commutative arithmetic floating point
  71 + operations with two register operands, where the source register is
  72 + %st, and destination register is %st(i).
  73 +
  74 + The affected opcode map is dceX, dcfX, deeX, defX. */
  75 +
  76 +#ifndef SYSV386_COMPAT
43 77 /* Set non-zero for broken, compatible instructions. Set to zero for
44   - non-broken opcodes. */
45   -#define UNIXWARE_COMPAT 1
  78 + non-broken opcodes at your peril. gcc generates SystemV/386
  79 + compatible instructions. */
  80 +#define SYSV386_COMPAT 1
  81 +#endif
  82 +#ifndef OLDGCC_COMPAT
  83 +/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
  84 + generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
  85 + reversed. */
  86 +#define OLDGCC_COMPAT SYSV386_COMPAT
46 87 #endif
47 88  
  89 +#define MOV_AX_DISP32 0xa0
  90 +#define POP_SEG_SHORT 0x07
  91 +#define JUMP_PC_RELATIVE 0xeb
  92 +#define INT_OPCODE 0xcd
  93 +#define INT3_OPCODE 0xcc
  94 +/* The opcode for the fwait instruction, which disassembler treats as a
  95 + prefix when it can. */
  96 +#define FWAIT_OPCODE 0x9b
  97 +#define ADDR_PREFIX_OPCODE 0x67
  98 +#define DATA_PREFIX_OPCODE 0x66
  99 +#define LOCK_PREFIX_OPCODE 0xf0
  100 +#define CS_PREFIX_OPCODE 0x2e
  101 +#define DS_PREFIX_OPCODE 0x3e
  102 +#define ES_PREFIX_OPCODE 0x26
  103 +#define FS_PREFIX_OPCODE 0x64
  104 +#define GS_PREFIX_OPCODE 0x65
  105 +#define SS_PREFIX_OPCODE 0x36
  106 +#define REPNE_PREFIX_OPCODE 0xf2
  107 +#define REPE_PREFIX_OPCODE 0xf3
  108 +
  109 +#define TWO_BYTE_OPCODE_ESCAPE 0x0f
  110 +#define NOP_OPCODE (char) 0x90
  111 +
  112 +/* register numbers */
  113 +#define EBP_REG_NUM 5
  114 +#define ESP_REG_NUM 4
  115 +
  116 +/* modrm_byte.regmem for twobyte escape */
  117 +#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
  118 +/* index_base_byte.index for no index register addressing */
  119 +#define NO_INDEX_REGISTER ESP_REG_NUM
  120 +/* index_base_byte.base for no base register addressing */
  121 +#define NO_BASE_REGISTER EBP_REG_NUM
  122 +#define NO_BASE_REGISTER_16 6
  123 +
  124 +/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
  125 +#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
  126 +#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
  127 +
  128 +/* x86-64 extension prefix. */
  129 +#define REX_OPCODE 0x40
  130 +
  131 +/* Indicates 64 bit operand size. */
  132 +#define REX_W 8
  133 +/* High extension to reg field of modrm byte. */
  134 +#define REX_R 4
  135 +/* High extension to SIB index field. */
  136 +#define REX_X 2
  137 +/* High extension to base field of modrm or SIB, or reg field of opcode. */
  138 +#define REX_B 1
  139 +
  140 +/* max operands per insn */
  141 +#define MAX_OPERANDS 4
  142 +
  143 +/* max immediates per insn (lcall, ljmp, insertq, extrq) */
  144 +#define MAX_IMMEDIATE_OPERANDS 2
  145 +
  146 +/* max memory refs per insn (string ops) */
  147 +#define MAX_MEMORY_OPERANDS 2
  148 +
  149 +/* max size of insn mnemonics. */
  150 +#define MAX_MNEM_SIZE 16
  151 +
  152 +/* max size of register name in insn mnemonics. */
  153 +#define MAX_REG_NAME_SIZE 8
  154 +
  155 +/* opcodes/i386-dis.c r1.126 */
  156 +#include "qemu-common.h"
  157 +
  158 +#include <setjmp.h>
  159 +
48 160 static int fetch_data (struct disassemble_info *, bfd_byte *);
49 161 static void ckprefix (void);
50 162 static const char *prefix_name (int, int);
... ... @@ -57,6 +169,7 @@ static void oappend (const char *);
57 169 static void append_seg (void);
58 170 static void OP_indirE (int, int);
59 171 static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
  172 +static void print_displacement (char *, bfd_vma);
60 173 static void OP_E (int, int);
61 174 static void OP_G (int, int);
62 175 static bfd_vma get64 (void);
... ... @@ -80,18 +193,21 @@ static void OP_DSreg (int, int);
80 193 static void OP_C (int, int);
81 194 static void OP_D (int, int);
82 195 static void OP_T (int, int);
83   -static void OP_Rd (int, int);
  196 +static void OP_R (int, int);
84 197 static void OP_MMX (int, int);
85 198 static void OP_XMM (int, int);
86 199 static void OP_EM (int, int);
87 200 static void OP_EX (int, int);
  201 +static void OP_EMC (int,int);
  202 +static void OP_MXC (int,int);
88 203 static void OP_MS (int, int);
89 204 static void OP_XS (int, int);
90 205 static void OP_M (int, int);
91 206 static void OP_VMX (int, int);
92 207 static void OP_0fae (int, int);
93 208 static void OP_0f07 (int, int);
94   -static void NOP_Fixup (int, int);
  209 +static void NOP_Fixup1 (int, int);
  210 +static void NOP_Fixup2 (int, int);
95 211 static void OP_3DNowSuffix (int, int);
96 212 static void OP_SIMD_Suffix (int, int);
97 213 static void SIMD_Fixup (int, int);
... ... @@ -99,23 +215,21 @@ static void PNI_Fixup (int, int);
99 215 static void SVME_Fixup (int, int);
100 216 static void INVLPG_Fixup (int, int);
101 217 static void BadOp (void);
102   -static void SEG_Fixup (int, int);
103 218 static void VMX_Fixup (int, int);
104 219 static void REP_Fixup (int, int);
  220 +static void CMPXCHG8B_Fixup (int, int);
  221 +static void XMM_Fixup (int, int);
  222 +static void CRC32_Fixup (int, int);
105 223  
106 224 struct dis_private {
107 225 /* Points to first byte not fetched. */
108 226 bfd_byte *max_fetched;
109   - bfd_byte the_buffer[MAXLEN];
  227 + bfd_byte the_buffer[MAX_MNEM_SIZE];
110 228 bfd_vma insn_start;
111 229 int orig_sizeflag;
112 230 jmp_buf bailout;
113 231 };
114 232  
115   -/* The opcode for the fwait instruction, which we treat as a prefix
116   - when we can. */
117   -#define FWAIT_OPCODE (0x9b)
118   -
119 233 enum address_mode
120 234 {
121 235 mode_16bit,
... ... @@ -132,10 +246,6 @@ static int prefixes;
132 246 static int rex;
133 247 /* Bits of REX we've already used. */
134 248 static int rex_used;
135   -#define REX_MODE64 8
136   -#define REX_EXTX 4
137   -#define REX_EXTY 2
138   -#define REX_EXTZ 1
139 249 /* Mark parts used in the REX prefix. When we are testing for
140 250 empty prefix (for 8bit register REX extension), just mask it
141 251 out. Otherwise test for REX bit is excuse for existence of REX
... ... @@ -143,9 +253,12 @@ static int rex_used;
143 253 #define USED_REX(value) \
144 254 { \
145 255 if (value) \
146   - rex_used |= (rex & value) ? (value) | 0x40 : 0; \
  256 + { \
  257 + if ((rex & value)) \
  258 + rex_used |= (value) | REX_OPCODE; \
  259 + } \
147 260 else \
148   - rex_used |= 0x40; \
  261 + rex_used |= REX_OPCODE; \
149 262 }
150 263  
151 264 /* Flags for prefixes which we somehow handled when printing the
... ... @@ -180,7 +293,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
180 293 struct dis_private *priv = (struct dis_private *) info->private_data;
181 294 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
182 295  
183   - if (addr <= priv->the_buffer + MAXLEN)
  296 + if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
184 297 status = (*info->read_memory_func) (start,
185 298 priv->max_fetched,
186 299 addr - priv->max_fetched,
... ... @@ -202,130 +315,142 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
202 315 return 1;
203 316 }
204 317  
205   -#define XX NULL, 0
206   -
207   -#define Eb OP_E, b_mode
208   -#define Ev OP_E, v_mode
209   -#define Ed OP_E, d_mode
210   -#define Eq OP_E, q_mode
211   -#define Edq OP_E, dq_mode
212   -#define Edqw OP_E, dqw_mode
213   -#define indirEv OP_indirE, stack_v_mode
214   -#define indirEp OP_indirE, f_mode
215   -#define stackEv OP_E, stack_v_mode
216   -#define Em OP_E, m_mode
217   -#define Ew OP_E, w_mode
218   -#define Ma OP_E, v_mode
219   -#define M OP_M, 0 /* lea, lgdt, etc. */
220   -#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
221   -#define Gb OP_G, b_mode
222   -#define Gv OP_G, v_mode
223   -#define Gd OP_G, d_mode
224   -#define Gdq OP_G, dq_mode
225   -#define Gm OP_G, m_mode
226   -#define Gw OP_G, w_mode
227   -#define Rd OP_Rd, d_mode
228   -#define Rm OP_Rd, m_mode
229   -#define Ib OP_I, b_mode
230   -#define sIb OP_sI, b_mode /* sign extened byte */
231   -#define Iv OP_I, v_mode
232   -#define Iq OP_I, q_mode
233   -#define Iv64 OP_I64, v_mode
234   -#define Iw OP_I, w_mode
235   -#define I1 OP_I, const_1_mode
236   -#define Jb OP_J, b_mode
237   -#define Jv OP_J, v_mode
238   -#define Cm OP_C, m_mode
239   -#define Dm OP_D, m_mode
240   -#define Td OP_T, d_mode
241   -#define Sv SEG_Fixup, v_mode
242   -
243   -#define RMeAX OP_REG, eAX_reg
244   -#define RMeBX OP_REG, eBX_reg
245   -#define RMeCX OP_REG, eCX_reg
246   -#define RMeDX OP_REG, eDX_reg
247   -#define RMeSP OP_REG, eSP_reg
248   -#define RMeBP OP_REG, eBP_reg
249   -#define RMeSI OP_REG, eSI_reg
250   -#define RMeDI OP_REG, eDI_reg
251   -#define RMrAX OP_REG, rAX_reg
252   -#define RMrBX OP_REG, rBX_reg
253   -#define RMrCX OP_REG, rCX_reg
254   -#define RMrDX OP_REG, rDX_reg
255   -#define RMrSP OP_REG, rSP_reg
256   -#define RMrBP OP_REG, rBP_reg
257   -#define RMrSI OP_REG, rSI_reg
258   -#define RMrDI OP_REG, rDI_reg
259   -#define RMAL OP_REG, al_reg
260   -#define RMAL OP_REG, al_reg
261   -#define RMCL OP_REG, cl_reg
262   -#define RMDL OP_REG, dl_reg
263   -#define RMBL OP_REG, bl_reg
264   -#define RMAH OP_REG, ah_reg
265   -#define RMCH OP_REG, ch_reg
266   -#define RMDH OP_REG, dh_reg
267   -#define RMBH OP_REG, bh_reg
268   -#define RMAX OP_REG, ax_reg
269   -#define RMDX OP_REG, dx_reg
270   -
271   -#define eAX OP_IMREG, eAX_reg
272   -#define eBX OP_IMREG, eBX_reg
273   -#define eCX OP_IMREG, eCX_reg
274   -#define eDX OP_IMREG, eDX_reg
275   -#define eSP OP_IMREG, eSP_reg
276   -#define eBP OP_IMREG, eBP_reg
277   -#define eSI OP_IMREG, eSI_reg
278   -#define eDI OP_IMREG, eDI_reg
279   -#define AL OP_IMREG, al_reg
280   -#define CL OP_IMREG, cl_reg
281   -#define DL OP_IMREG, dl_reg
282   -#define BL OP_IMREG, bl_reg
283   -#define AH OP_IMREG, ah_reg
284   -#define CH OP_IMREG, ch_reg
285   -#define DH OP_IMREG, dh_reg
286   -#define BH OP_IMREG, bh_reg
287   -#define AX OP_IMREG, ax_reg
288   -#define DX OP_IMREG, dx_reg
289   -#define indirDX OP_IMREG, indir_dx_reg
290   -
291   -#define Sw OP_SEG, w_mode
292   -#define Ap OP_DIR, 0
293   -#define Ob OP_OFF64, b_mode
294   -#define Ov OP_OFF64, v_mode
295   -#define Xb OP_DSreg, eSI_reg
296   -#define Xv OP_DSreg, eSI_reg
297   -#define Yb OP_ESreg, eDI_reg
298   -#define Yv OP_ESreg, eDI_reg
299   -#define DSBX OP_DSreg, eBX_reg
300   -
301   -#define es OP_REG, es_reg
302   -#define ss OP_REG, ss_reg
303   -#define cs OP_REG, cs_reg
304   -#define ds OP_REG, ds_reg
305   -#define fs OP_REG, fs_reg
306   -#define gs OP_REG, gs_reg
307   -
308   -#define MX OP_MMX, 0
309   -#define XM OP_XMM, 0
310   -#define EM OP_EM, v_mode
311   -#define EX OP_EX, v_mode
312   -#define MS OP_MS, v_mode
313   -#define XS OP_XS, v_mode
314   -#define VM OP_VMX, q_mode
315   -#define OPSUF OP_3DNowSuffix, 0
316   -#define OPSIMD OP_SIMD_Suffix, 0
  318 +#define XX { NULL, 0 }
  319 +
  320 +#define Eb { OP_E, b_mode }
  321 +#define Ev { OP_E, v_mode }
  322 +#define Ed { OP_E, d_mode }
  323 +#define Edq { OP_E, dq_mode }
  324 +#define Edqw { OP_E, dqw_mode }
  325 +#define Edqb { OP_E, dqb_mode }
  326 +#define Edqd { OP_E, dqd_mode }
  327 +#define indirEv { OP_indirE, stack_v_mode }
  328 +#define indirEp { OP_indirE, f_mode }
  329 +#define stackEv { OP_E, stack_v_mode }
  330 +#define Em { OP_E, m_mode }
  331 +#define Ew { OP_E, w_mode }
  332 +#define M { OP_M, 0 } /* lea, lgdt, etc. */
  333 +#define Ma { OP_M, v_mode }
  334 +#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
  335 +#define Mq { OP_M, q_mode }
  336 +#define Gb { OP_G, b_mode }
  337 +#define Gv { OP_G, v_mode }
  338 +#define Gd { OP_G, d_mode }
  339 +#define Gdq { OP_G, dq_mode }
  340 +#define Gm { OP_G, m_mode }
  341 +#define Gw { OP_G, w_mode }
  342 +#define Rd { OP_R, d_mode }
  343 +#define Rm { OP_R, m_mode }
  344 +#define Ib { OP_I, b_mode }
  345 +#define sIb { OP_sI, b_mode } /* sign extened byte */
  346 +#define Iv { OP_I, v_mode }
  347 +#define Iq { OP_I, q_mode }
  348 +#define Iv64 { OP_I64, v_mode }
  349 +#define Iw { OP_I, w_mode }
  350 +#define I1 { OP_I, const_1_mode }
  351 +#define Jb { OP_J, b_mode }
  352 +#define Jv { OP_J, v_mode }
  353 +#define Cm { OP_C, m_mode }
  354 +#define Dm { OP_D, m_mode }
  355 +#define Td { OP_T, d_mode }
  356 +
  357 +#define RMeAX { OP_REG, eAX_reg }
  358 +#define RMeBX { OP_REG, eBX_reg }
  359 +#define RMeCX { OP_REG, eCX_reg }
  360 +#define RMeDX { OP_REG, eDX_reg }
  361 +#define RMeSP { OP_REG, eSP_reg }
  362 +#define RMeBP { OP_REG, eBP_reg }
  363 +#define RMeSI { OP_REG, eSI_reg }
  364 +#define RMeDI { OP_REG, eDI_reg }
  365 +#define RMrAX { OP_REG, rAX_reg }
  366 +#define RMrBX { OP_REG, rBX_reg }
  367 +#define RMrCX { OP_REG, rCX_reg }
  368 +#define RMrDX { OP_REG, rDX_reg }
  369 +#define RMrSP { OP_REG, rSP_reg }
  370 +#define RMrBP { OP_REG, rBP_reg }
  371 +#define RMrSI { OP_REG, rSI_reg }
  372 +#define RMrDI { OP_REG, rDI_reg }
  373 +#define RMAL { OP_REG, al_reg }
  374 +#define RMAL { OP_REG, al_reg }
  375 +#define RMCL { OP_REG, cl_reg }
  376 +#define RMDL { OP_REG, dl_reg }
  377 +#define RMBL { OP_REG, bl_reg }
  378 +#define RMAH { OP_REG, ah_reg }
  379 +#define RMCH { OP_REG, ch_reg }
  380 +#define RMDH { OP_REG, dh_reg }
  381 +#define RMBH { OP_REG, bh_reg }
  382 +#define RMAX { OP_REG, ax_reg }
  383 +#define RMDX { OP_REG, dx_reg }
  384 +
  385 +#define eAX { OP_IMREG, eAX_reg }
  386 +#define eBX { OP_IMREG, eBX_reg }
  387 +#define eCX { OP_IMREG, eCX_reg }
  388 +#define eDX { OP_IMREG, eDX_reg }
  389 +#define eSP { OP_IMREG, eSP_reg }
  390 +#define eBP { OP_IMREG, eBP_reg }
  391 +#define eSI { OP_IMREG, eSI_reg }
  392 +#define eDI { OP_IMREG, eDI_reg }
  393 +#define AL { OP_IMREG, al_reg }
  394 +#define CL { OP_IMREG, cl_reg }
  395 +#define DL { OP_IMREG, dl_reg }
  396 +#define BL { OP_IMREG, bl_reg }
  397 +#define AH { OP_IMREG, ah_reg }
  398 +#define CH { OP_IMREG, ch_reg }
  399 +#define DH { OP_IMREG, dh_reg }
  400 +#define BH { OP_IMREG, bh_reg }
  401 +#define AX { OP_IMREG, ax_reg }
  402 +#define DX { OP_IMREG, dx_reg }
  403 +#define zAX { OP_IMREG, z_mode_ax_reg }
  404 +#define indirDX { OP_IMREG, indir_dx_reg }
  405 +
  406 +#define Sw { OP_SEG, w_mode }
  407 +#define Sv { OP_SEG, v_mode }
  408 +#define Ap { OP_DIR, 0 }
  409 +#define Ob { OP_OFF64, b_mode }
  410 +#define Ov { OP_OFF64, v_mode }
  411 +#define Xb { OP_DSreg, eSI_reg }
  412 +#define Xv { OP_DSreg, eSI_reg }
  413 +#define Xz { OP_DSreg, eSI_reg }
  414 +#define Yb { OP_ESreg, eDI_reg }
  415 +#define Yv { OP_ESreg, eDI_reg }
  416 +#define DSBX { OP_DSreg, eBX_reg }
  417 +
  418 +#define es { OP_REG, es_reg }
  419 +#define ss { OP_REG, ss_reg }
  420 +#define cs { OP_REG, cs_reg }
  421 +#define ds { OP_REG, ds_reg }
  422 +#define fs { OP_REG, fs_reg }
  423 +#define gs { OP_REG, gs_reg }
  424 +
  425 +#define MX { OP_MMX, 0 }
  426 +#define XM { OP_XMM, 0 }
  427 +#define EM { OP_EM, v_mode }
  428 +#define EMd { OP_EM, d_mode }
  429 +#define EMq { OP_EM, q_mode }
  430 +#define EXd { OP_EX, d_mode }
  431 +#define EXq { OP_EX, q_mode }
  432 +#define EXx { OP_EX, x_mode }
  433 +#define MS { OP_MS, v_mode }
  434 +#define XS { OP_XS, v_mode }
  435 +#define EMC { OP_EMC, v_mode }
  436 +#define MXC { OP_MXC, 0 }
  437 +#define VM { OP_VMX, q_mode }
  438 +#define OPSUF { OP_3DNowSuffix, 0 }
  439 +#define OPSIMD { OP_SIMD_Suffix, 0 }
  440 +#define XMM0 { XMM_Fixup, 0 }
317 441  
318 442 /* Used handle "rep" prefix for string instructions. */
319   -#define Xbr REP_Fixup, eSI_reg
320   -#define Xvr REP_Fixup, eSI_reg
321   -#define Ybr REP_Fixup, eDI_reg
322   -#define Yvr REP_Fixup, eDI_reg
323   -#define indirDXr REP_Fixup, indir_dx_reg
324   -#define ALr REP_Fixup, al_reg
325   -#define eAXr REP_Fixup, eAX_reg
326   -
327   -#define cond_jump_flag NULL, cond_jump_mode
328   -#define loop_jcxz_flag NULL, loop_jcxz_mode
  443 +#define Xbr { REP_Fixup, eSI_reg }
  444 +#define Xvr { REP_Fixup, eSI_reg }
  445 +#define Ybr { REP_Fixup, eDI_reg }
  446 +#define Yvr { REP_Fixup, eDI_reg }
  447 +#define Yzr { REP_Fixup, eDI_reg }
  448 +#define indirDXr { REP_Fixup, indir_dx_reg }
  449 +#define ALr { REP_Fixup, al_reg }
  450 +#define eAXr { REP_Fixup, eAX_reg }
  451 +
  452 +#define cond_jump_flag { NULL, cond_jump_mode }
  453 +#define loop_jcxz_flag { NULL, loop_jcxz_mode }
329 454  
330 455 /* bits in sizeflag */
331 456 #define SUFFIX_ALWAYS 4
... ... @@ -347,6 +472,10 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
347 472 #define f_mode 13 /* 4- or 6-byte pointer operand */
348 473 #define const_1_mode 14
349 474 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
  475 +#define z_mode 16 /* non-quad operand size depends on prefixes */
  476 +#define o_mode 17 /* 16-byte operand */
  477 +#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
  478 +#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
350 479  
351 480 #define es_reg 100
352 481 #define cs_reg 101
... ... @@ -391,6 +520,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
391 520 #define rSI_reg 138
392 521 #define rDI_reg 139
393 522  
  523 +#define z_mode_ax_reg 149
394 524 #define indir_dx_reg 150
395 525  
396 526 #define FLOATCODE 1
... ... @@ -399,83 +529,154 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
399 529 #define X86_64_SPECIAL 4
400 530 #define IS_3BYTE_OPCODE 5
401 531  
402   -#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
403   -
404   -#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
405   -#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
406   -#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
407   -#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
408   -#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
409   -#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
410   -#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
411   -#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
412   -#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
413   -#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
414   -#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
415   -#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
416   -#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
417   -#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
418   -#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
419   -#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
420   -#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
421   -#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
422   -#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
423   -#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
424   -#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
425   -#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
426   -#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
427   -#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
428   -#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
429   -
430   -#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
431   -#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
432   -#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
433   -#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
434   -#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
435   -#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
436   -#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
437   -#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
438   -#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
439   -#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
440   -#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
441   -#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
442   -#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
443   -#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
444   -#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
445   -#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
446   -#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
447   -#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
448   -#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
449   -#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
450   -#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
451   -#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
452   -#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
453   -#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
454   -#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
455   -#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
456   -#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
457   -#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
458   -#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
459   -#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
460   -#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
461   -#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
462   -#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
463   -
464   -#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
465   -
466   -#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0
467   -#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0
  532 +#define FLOAT NULL, { { NULL, FLOATCODE } }
  533 +
  534 +#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
  535 +#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
  536 +#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
  537 +#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
  538 +#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
  539 +#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
  540 +#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
  541 +#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
  542 +#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
  543 +#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
  544 +#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
  545 +#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
  546 +#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
  547 +#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
  548 +#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
  549 +#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
  550 +#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
  551 +#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
  552 +#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
  553 +#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
  554 +#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
  555 +#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
  556 +#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
  557 +#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
  558 +#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
  559 +#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
  560 +#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
  561 +#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
  562 +
  563 +#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
  564 +#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
  565 +#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
  566 +#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
  567 +#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
  568 +#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
  569 +#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
  570 +#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
  571 +#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
  572 +#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
  573 +#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
  574 +#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
  575 +#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
  576 +#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
  577 +#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
  578 +#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
  579 +#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
  580 +#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
  581 +#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
  582 +#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
  583 +#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
  584 +#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
  585 +#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
  586 +#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
  587 +#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
  588 +#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
  589 +#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
  590 +#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
  591 +#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
  592 +#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
  593 +#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
  594 +#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
  595 +#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
  596 +#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
  597 +#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
  598 +#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
  599 +#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
  600 +#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
  601 +#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
  602 +#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
  603 +#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
  604 +#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
  605 +#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
  606 +#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
  607 +#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
  608 +#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
  609 +#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
  610 +#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
  611 +#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
  612 +#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
  613 +#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
  614 +#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
  615 +#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
  616 +#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
  617 +#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
  618 +#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
  619 +#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
  620 +#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
  621 +#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
  622 +#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
  623 +#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
  624 +#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
  625 +#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
  626 +#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
  627 +#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
  628 +#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
  629 +#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
  630 +#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
  631 +#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
  632 +#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
  633 +#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
  634 +#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
  635 +#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
  636 +#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
  637 +#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
  638 +#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
  639 +#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
  640 +#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
  641 +#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
  642 +#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
  643 +#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
  644 +#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
  645 +#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
  646 +#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
  647 +#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
  648 +#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
  649 +#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
  650 +#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
  651 +#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
  652 +#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
  653 +#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
  654 +#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
  655 +#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
  656 +#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
  657 +#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
  658 +#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
  659 +#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
  660 +#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
  661 +
  662 +
  663 +#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
  664 +#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
  665 +#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
  666 +#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
  667 +
  668 +#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
  669 +#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
468 670  
469 671 typedef void (*op_rtn) (int bytemode, int sizeflag);
470 672  
471 673 struct dis386 {
472 674 const char *name;
473   - op_rtn op1;
474   - int bytemode1;
475   - op_rtn op2;
476   - int bytemode2;
477   - op_rtn op3;
478   - int bytemode3;
  675 + struct
  676 + {
  677 + op_rtn rtn;
  678 + int bytemode;
  679 + } op[MAX_OPERANDS];
479 680 };
480 681  
481 682 /* Upper case letters in the instruction names here are macros.
... ... @@ -483,25 +684,29 @@ struct dis386 {
483 684 'B' => print 'b' if suffix_always is true
484 685 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
485 686 . size prefix
  687 + 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
  688 + . suffix_always is true
486 689 'E' => print 'e' if 32-bit form of jcxz
487 690 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
  691 + 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
488 692 'H' => print ",pt" or ",pn" branch hint
489 693 'I' => honor following macro letter even in Intel mode (implemented only
490 694 . for some of the macro letters)
491 695 'J' => print 'l'
  696 + 'K' => print 'd' or 'q' if rex prefix is present.
492 697 'L' => print 'l' if suffix_always is true
493 698 'N' => print 'n' if instruction has no wait "prefix"
494   - 'O' => print 'd', or 'o'
  699 + 'O' => print 'd' or 'o' (or 'q' in Intel mode)
495 700 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
496 701 . or suffix_always is true. print 'q' if rex prefix is present.
497 702 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
498 703 . is true
499   - 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
  704 + 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
500 705 'S' => print 'w', 'l' or 'q' if suffix_always is true
501 706 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
502 707 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
503 708 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
504   - 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
  709 + 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
505 710 'X' => print 's', 'd' depending on data16 prefix (for XMM)
506 711 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
507 712 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
... ... @@ -517,248 +722,248 @@ struct dis386 {
517 722  
518 723 static const struct dis386 dis386[] = {
519 724 /* 00 */
520   - { "addB", Eb, Gb, XX },
521   - { "addS", Ev, Gv, XX },
522   - { "addB", Gb, Eb, XX },
523   - { "addS", Gv, Ev, XX },
524   - { "addB", AL, Ib, XX },
525   - { "addS", eAX, Iv, XX },
526   - { "push{T|}", es, XX, XX },
527   - { "pop{T|}", es, XX, XX },
  725 + { "addB", { Eb, Gb } },
  726 + { "addS", { Ev, Gv } },
  727 + { "addB", { Gb, Eb } },
  728 + { "addS", { Gv, Ev } },
  729 + { "addB", { AL, Ib } },
  730 + { "addS", { eAX, Iv } },
  731 + { "push{T|}", { es } },
  732 + { "pop{T|}", { es } },
528 733 /* 08 */
529   - { "orB", Eb, Gb, XX },
530   - { "orS", Ev, Gv, XX },
531   - { "orB", Gb, Eb, XX },
532   - { "orS", Gv, Ev, XX },
533   - { "orB", AL, Ib, XX },
534   - { "orS", eAX, Iv, XX },
535   - { "push{T|}", cs, XX, XX },
536   - { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
  734 + { "orB", { Eb, Gb } },
  735 + { "orS", { Ev, Gv } },
  736 + { "orB", { Gb, Eb } },
  737 + { "orS", { Gv, Ev } },
  738 + { "orB", { AL, Ib } },
  739 + { "orS", { eAX, Iv } },
  740 + { "push{T|}", { cs } },
  741 + { "(bad)", { XX } }, /* 0x0f extended opcode escape */
537 742 /* 10 */
538   - { "adcB", Eb, Gb, XX },
539   - { "adcS", Ev, Gv, XX },
540   - { "adcB", Gb, Eb, XX },
541   - { "adcS", Gv, Ev, XX },
542   - { "adcB", AL, Ib, XX },
543   - { "adcS", eAX, Iv, XX },
544   - { "push{T|}", ss, XX, XX },
545   - { "pop{T|}", ss, XX, XX },
  743 + { "adcB", { Eb, Gb } },
  744 + { "adcS", { Ev, Gv } },
  745 + { "adcB", { Gb, Eb } },
  746 + { "adcS", { Gv, Ev } },
  747 + { "adcB", { AL, Ib } },
  748 + { "adcS", { eAX, Iv } },
  749 + { "push{T|}", { ss } },
  750 + { "pop{T|}", { ss } },
546 751 /* 18 */
547   - { "sbbB", Eb, Gb, XX },
548   - { "sbbS", Ev, Gv, XX },
549   - { "sbbB", Gb, Eb, XX },
550   - { "sbbS", Gv, Ev, XX },
551   - { "sbbB", AL, Ib, XX },
552   - { "sbbS", eAX, Iv, XX },
553   - { "push{T|}", ds, XX, XX },
554   - { "pop{T|}", ds, XX, XX },
  752 + { "sbbB", { Eb, Gb } },
  753 + { "sbbS", { Ev, Gv } },
  754 + { "sbbB", { Gb, Eb } },
  755 + { "sbbS", { Gv, Ev } },
  756 + { "sbbB", { AL, Ib } },
  757 + { "sbbS", { eAX, Iv } },
  758 + { "push{T|}", { ds } },
  759 + { "pop{T|}", { ds } },
555 760 /* 20 */
556   - { "andB", Eb, Gb, XX },
557   - { "andS", Ev, Gv, XX },
558   - { "andB", Gb, Eb, XX },
559   - { "andS", Gv, Ev, XX },
560   - { "andB", AL, Ib, XX },
561   - { "andS", eAX, Iv, XX },
562   - { "(bad)", XX, XX, XX }, /* SEG ES prefix */
563   - { "daa{|}", XX, XX, XX },
  761 + { "andB", { Eb, Gb } },
  762 + { "andS", { Ev, Gv } },
  763 + { "andB", { Gb, Eb } },
  764 + { "andS", { Gv, Ev } },
  765 + { "andB", { AL, Ib } },
  766 + { "andS", { eAX, Iv } },
  767 + { "(bad)", { XX } }, /* SEG ES prefix */
  768 + { "daa{|}", { XX } },
564 769 /* 28 */
565   - { "subB", Eb, Gb, XX },
566   - { "subS", Ev, Gv, XX },
567   - { "subB", Gb, Eb, XX },
568   - { "subS", Gv, Ev, XX },
569   - { "subB", AL, Ib, XX },
570   - { "subS", eAX, Iv, XX },
571   - { "(bad)", XX, XX, XX }, /* SEG CS prefix */
572   - { "das{|}", XX, XX, XX },
  770 + { "subB", { Eb, Gb } },
  771 + { "subS", { Ev, Gv } },
  772 + { "subB", { Gb, Eb } },
  773 + { "subS", { Gv, Ev } },
  774 + { "subB", { AL, Ib } },
  775 + { "subS", { eAX, Iv } },
  776 + { "(bad)", { XX } }, /* SEG CS prefix */
  777 + { "das{|}", { XX } },
573 778 /* 30 */
574   - { "xorB", Eb, Gb, XX },
575   - { "xorS", Ev, Gv, XX },
576   - { "xorB", Gb, Eb, XX },
577   - { "xorS", Gv, Ev, XX },
578   - { "xorB", AL, Ib, XX },
579   - { "xorS", eAX, Iv, XX },
580   - { "(bad)", XX, XX, XX }, /* SEG SS prefix */
581   - { "aaa{|}", XX, XX, XX },
  779 + { "xorB", { Eb, Gb } },
  780 + { "xorS", { Ev, Gv } },
  781 + { "xorB", { Gb, Eb } },
  782 + { "xorS", { Gv, Ev } },
  783 + { "xorB", { AL, Ib } },
  784 + { "xorS", { eAX, Iv } },
  785 + { "(bad)", { XX } }, /* SEG SS prefix */
  786 + { "aaa{|}", { XX } },
582 787 /* 38 */
583   - { "cmpB", Eb, Gb, XX },
584   - { "cmpS", Ev, Gv, XX },
585   - { "cmpB", Gb, Eb, XX },
586   - { "cmpS", Gv, Ev, XX },
587   - { "cmpB", AL, Ib, XX },
588   - { "cmpS", eAX, Iv, XX },
589   - { "(bad)", XX, XX, XX }, /* SEG DS prefix */
590   - { "aas{|}", XX, XX, XX },
  788 + { "cmpB", { Eb, Gb } },
  789 + { "cmpS", { Ev, Gv } },
  790 + { "cmpB", { Gb, Eb } },
  791 + { "cmpS", { Gv, Ev } },
  792 + { "cmpB", { AL, Ib } },
  793 + { "cmpS", { eAX, Iv } },
  794 + { "(bad)", { XX } }, /* SEG DS prefix */
  795 + { "aas{|}", { XX } },
591 796 /* 40 */
592   - { "inc{S|}", RMeAX, XX, XX },
593   - { "inc{S|}", RMeCX, XX, XX },
594   - { "inc{S|}", RMeDX, XX, XX },
595   - { "inc{S|}", RMeBX, XX, XX },
596   - { "inc{S|}", RMeSP, XX, XX },
597   - { "inc{S|}", RMeBP, XX, XX },
598   - { "inc{S|}", RMeSI, XX, XX },
599   - { "inc{S|}", RMeDI, XX, XX },
  797 + { "inc{S|}", { RMeAX } },
  798 + { "inc{S|}", { RMeCX } },
  799 + { "inc{S|}", { RMeDX } },
  800 + { "inc{S|}", { RMeBX } },
  801 + { "inc{S|}", { RMeSP } },
  802 + { "inc{S|}", { RMeBP } },
  803 + { "inc{S|}", { RMeSI } },
  804 + { "inc{S|}", { RMeDI } },
600 805 /* 48 */
601   - { "dec{S|}", RMeAX, XX, XX },
602   - { "dec{S|}", RMeCX, XX, XX },
603   - { "dec{S|}", RMeDX, XX, XX },
604   - { "dec{S|}", RMeBX, XX, XX },
605   - { "dec{S|}", RMeSP, XX, XX },
606   - { "dec{S|}", RMeBP, XX, XX },
607   - { "dec{S|}", RMeSI, XX, XX },
608   - { "dec{S|}", RMeDI, XX, XX },
  806 + { "dec{S|}", { RMeAX } },
  807 + { "dec{S|}", { RMeCX } },
  808 + { "dec{S|}", { RMeDX } },
  809 + { "dec{S|}", { RMeBX } },
  810 + { "dec{S|}", { RMeSP } },
  811 + { "dec{S|}", { RMeBP } },
  812 + { "dec{S|}", { RMeSI } },
  813 + { "dec{S|}", { RMeDI } },
609 814 /* 50 */
610   - { "pushV", RMrAX, XX, XX },
611   - { "pushV", RMrCX, XX, XX },
612   - { "pushV", RMrDX, XX, XX },
613   - { "pushV", RMrBX, XX, XX },
614   - { "pushV", RMrSP, XX, XX },
615   - { "pushV", RMrBP, XX, XX },
616   - { "pushV", RMrSI, XX, XX },
617   - { "pushV", RMrDI, XX, XX },
  815 + { "pushV", { RMrAX } },
  816 + { "pushV", { RMrCX } },
  817 + { "pushV", { RMrDX } },
  818 + { "pushV", { RMrBX } },
  819 + { "pushV", { RMrSP } },
  820 + { "pushV", { RMrBP } },
  821 + { "pushV", { RMrSI } },
  822 + { "pushV", { RMrDI } },
618 823 /* 58 */
619   - { "popV", RMrAX, XX, XX },
620   - { "popV", RMrCX, XX, XX },
621   - { "popV", RMrDX, XX, XX },
622   - { "popV", RMrBX, XX, XX },
623   - { "popV", RMrSP, XX, XX },
624   - { "popV", RMrBP, XX, XX },
625   - { "popV", RMrSI, XX, XX },
626   - { "popV", RMrDI, XX, XX },
  824 + { "popV", { RMrAX } },
  825 + { "popV", { RMrCX } },
  826 + { "popV", { RMrDX } },
  827 + { "popV", { RMrBX } },
  828 + { "popV", { RMrSP } },
  829 + { "popV", { RMrBP } },
  830 + { "popV", { RMrSI } },
  831 + { "popV", { RMrDI } },
627 832 /* 60 */
628   - { "pusha{P|}", XX, XX, XX },
629   - { "popa{P|}", XX, XX, XX },
630   - { "bound{S|}", Gv, Ma, XX },
631 833 { X86_64_0 },
632   - { "(bad)", XX, XX, XX }, /* seg fs */
633   - { "(bad)", XX, XX, XX }, /* seg gs */
634   - { "(bad)", XX, XX, XX }, /* op size prefix */
635   - { "(bad)", XX, XX, XX }, /* adr size prefix */
  834 + { X86_64_1 },
  835 + { X86_64_2 },
  836 + { X86_64_3 },
  837 + { "(bad)", { XX } }, /* seg fs */
  838 + { "(bad)", { XX } }, /* seg gs */
  839 + { "(bad)", { XX } }, /* op size prefix */
  840 + { "(bad)", { XX } }, /* adr size prefix */
636 841 /* 68 */
637   - { "pushT", Iq, XX, XX },
638   - { "imulS", Gv, Ev, Iv },
639   - { "pushT", sIb, XX, XX },
640   - { "imulS", Gv, Ev, sIb },
641   - { "ins{b||b|}", Ybr, indirDX, XX },
642   - { "ins{R||R|}", Yvr, indirDX, XX },
643   - { "outs{b||b|}", indirDXr, Xb, XX },
644   - { "outs{R||R|}", indirDXr, Xv, XX },
  842 + { "pushT", { Iq } },
  843 + { "imulS", { Gv, Ev, Iv } },
  844 + { "pushT", { sIb } },
  845 + { "imulS", { Gv, Ev, sIb } },
  846 + { "ins{b||b|}", { Ybr, indirDX } },
  847 + { "ins{R||G|}", { Yzr, indirDX } },
  848 + { "outs{b||b|}", { indirDXr, Xb } },
  849 + { "outs{R||G|}", { indirDXr, Xz } },
645 850 /* 70 */
646   - { "joH", Jb, XX, cond_jump_flag },
647   - { "jnoH", Jb, XX, cond_jump_flag },
648   - { "jbH", Jb, XX, cond_jump_flag },
649   - { "jaeH", Jb, XX, cond_jump_flag },
650   - { "jeH", Jb, XX, cond_jump_flag },
651   - { "jneH", Jb, XX, cond_jump_flag },
652   - { "jbeH", Jb, XX, cond_jump_flag },
653   - { "jaH", Jb, XX, cond_jump_flag },
  851 + { "joH", { Jb, XX, cond_jump_flag } },
  852 + { "jnoH", { Jb, XX, cond_jump_flag } },
  853 + { "jbH", { Jb, XX, cond_jump_flag } },
  854 + { "jaeH", { Jb, XX, cond_jump_flag } },
  855 + { "jeH", { Jb, XX, cond_jump_flag } },
  856 + { "jneH", { Jb, XX, cond_jump_flag } },
  857 + { "jbeH", { Jb, XX, cond_jump_flag } },
  858 + { "jaH", { Jb, XX, cond_jump_flag } },
654 859 /* 78 */
655   - { "jsH", Jb, XX, cond_jump_flag },
656   - { "jnsH", Jb, XX, cond_jump_flag },
657   - { "jpH", Jb, XX, cond_jump_flag },
658   - { "jnpH", Jb, XX, cond_jump_flag },
659   - { "jlH", Jb, XX, cond_jump_flag },
660   - { "jgeH", Jb, XX, cond_jump_flag },
661   - { "jleH", Jb, XX, cond_jump_flag },
662   - { "jgH", Jb, XX, cond_jump_flag },
  860 + { "jsH", { Jb, XX, cond_jump_flag } },
  861 + { "jnsH", { Jb, XX, cond_jump_flag } },
  862 + { "jpH", { Jb, XX, cond_jump_flag } },
  863 + { "jnpH", { Jb, XX, cond_jump_flag } },
  864 + { "jlH", { Jb, XX, cond_jump_flag } },
  865 + { "jgeH", { Jb, XX, cond_jump_flag } },
  866 + { "jleH", { Jb, XX, cond_jump_flag } },
  867 + { "jgH", { Jb, XX, cond_jump_flag } },
663 868 /* 80 */
664 869 { GRP1b },
665 870 { GRP1S },
666   - { "(bad)", XX, XX, XX },
  871 + { "(bad)", { XX } },
667 872 { GRP1Ss },
668   - { "testB", Eb, Gb, XX },
669   - { "testS", Ev, Gv, XX },
670   - { "xchgB", Eb, Gb, XX },
671   - { "xchgS", Ev, Gv, XX },
  873 + { "testB", { Eb, Gb } },
  874 + { "testS", { Ev, Gv } },
  875 + { "xchgB", { Eb, Gb } },
  876 + { "xchgS", { Ev, Gv } },
672 877 /* 88 */
673   - { "movB", Eb, Gb, XX },
674   - { "movS", Ev, Gv, XX },
675   - { "movB", Gb, Eb, XX },
676   - { "movS", Gv, Ev, XX },
677   - { "movQ", Sv, Sw, XX },
678   - { "leaS", Gv, M, XX },
679   - { "movQ", Sw, Sv, XX },
680   - { "popU", stackEv, XX, XX },
  878 + { "movB", { Eb, Gb } },
  879 + { "movS", { Ev, Gv } },
  880 + { "movB", { Gb, Eb } },
  881 + { "movS", { Gv, Ev } },
  882 + { "movD", { Sv, Sw } },
  883 + { "leaS", { Gv, M } },
  884 + { "movD", { Sw, Sv } },
  885 + { GRP1a },
681 886 /* 90 */
682   - { "nop", NOP_Fixup, 0, XX, XX },
683   - { "xchgS", RMeCX, eAX, XX },
684   - { "xchgS", RMeDX, eAX, XX },
685   - { "xchgS", RMeBX, eAX, XX },
686   - { "xchgS", RMeSP, eAX, XX },
687   - { "xchgS", RMeBP, eAX, XX },
688   - { "xchgS", RMeSI, eAX, XX },
689   - { "xchgS", RMeDI, eAX, XX },
  887 + { PREGRP38 },
  888 + { "xchgS", { RMeCX, eAX } },
  889 + { "xchgS", { RMeDX, eAX } },
  890 + { "xchgS", { RMeBX, eAX } },
  891 + { "xchgS", { RMeSP, eAX } },
  892 + { "xchgS", { RMeBP, eAX } },
  893 + { "xchgS", { RMeSI, eAX } },
  894 + { "xchgS", { RMeDI, eAX } },
690 895 /* 98 */
691   - { "cW{tR||tR|}", XX, XX, XX },
692   - { "cR{tO||tO|}", XX, XX, XX },
693   - { "Jcall{T|}", Ap, XX, XX },
694   - { "(bad)", XX, XX, XX }, /* fwait */
695   - { "pushfT", XX, XX, XX },
696   - { "popfT", XX, XX, XX },
697   - { "sahf{|}", XX, XX, XX },
698   - { "lahf{|}", XX, XX, XX },
  896 + { "cW{t||t|}R", { XX } },
  897 + { "cR{t||t|}O", { XX } },
  898 + { "Jcall{T|}", { Ap } },
  899 + { "(bad)", { XX } }, /* fwait */
  900 + { "pushfT", { XX } },
  901 + { "popfT", { XX } },
  902 + { "sahf{|}", { XX } },
  903 + { "lahf{|}", { XX } },
699 904 /* a0 */
700   - { "movB", AL, Ob, XX },
701   - { "movS", eAX, Ov, XX },
702   - { "movB", Ob, AL, XX },
703   - { "movS", Ov, eAX, XX },
704   - { "movs{b||b|}", Ybr, Xb, XX },
705   - { "movs{R||R|}", Yvr, Xv, XX },
706   - { "cmps{b||b|}", Xb, Yb, XX },
707   - { "cmps{R||R|}", Xv, Yv, XX },
  905 + { "movB", { AL, Ob } },
  906 + { "movS", { eAX, Ov } },
  907 + { "movB", { Ob, AL } },
  908 + { "movS", { Ov, eAX } },
  909 + { "movs{b||b|}", { Ybr, Xb } },
  910 + { "movs{R||R|}", { Yvr, Xv } },
  911 + { "cmps{b||b|}", { Xb, Yb } },
  912 + { "cmps{R||R|}", { Xv, Yv } },
708 913 /* a8 */
709   - { "testB", AL, Ib, XX },
710   - { "testS", eAX, Iv, XX },
711   - { "stosB", Ybr, AL, XX },
712   - { "stosS", Yvr, eAX, XX },
713   - { "lodsB", ALr, Xb, XX },
714   - { "lodsS", eAXr, Xv, XX },
715   - { "scasB", AL, Yb, XX },
716   - { "scasS", eAX, Yv, XX },
  914 + { "testB", { AL, Ib } },
  915 + { "testS", { eAX, Iv } },
  916 + { "stosB", { Ybr, AL } },
  917 + { "stosS", { Yvr, eAX } },
  918 + { "lodsB", { ALr, Xb } },
  919 + { "lodsS", { eAXr, Xv } },
  920 + { "scasB", { AL, Yb } },
  921 + { "scasS", { eAX, Yv } },
717 922 /* b0 */
718   - { "movB", RMAL, Ib, XX },
719   - { "movB", RMCL, Ib, XX },
720   - { "movB", RMDL, Ib, XX },
721   - { "movB", RMBL, Ib, XX },
722   - { "movB", RMAH, Ib, XX },
723   - { "movB", RMCH, Ib, XX },
724   - { "movB", RMDH, Ib, XX },
725   - { "movB", RMBH, Ib, XX },
  923 + { "movB", { RMAL, Ib } },
  924 + { "movB", { RMCL, Ib } },
  925 + { "movB", { RMDL, Ib } },
  926 + { "movB", { RMBL, Ib } },
  927 + { "movB", { RMAH, Ib } },
  928 + { "movB", { RMCH, Ib } },
  929 + { "movB", { RMDH, Ib } },
  930 + { "movB", { RMBH, Ib } },
726 931 /* b8 */
727   - { "movS", RMeAX, Iv64, XX },
728   - { "movS", RMeCX, Iv64, XX },
729   - { "movS", RMeDX, Iv64, XX },
730   - { "movS", RMeBX, Iv64, XX },
731   - { "movS", RMeSP, Iv64, XX },
732   - { "movS", RMeBP, Iv64, XX },
733   - { "movS", RMeSI, Iv64, XX },
734   - { "movS", RMeDI, Iv64, XX },
  932 + { "movS", { RMeAX, Iv64 } },
  933 + { "movS", { RMeCX, Iv64 } },
  934 + { "movS", { RMeDX, Iv64 } },
  935 + { "movS", { RMeBX, Iv64 } },
  936 + { "movS", { RMeSP, Iv64 } },
  937 + { "movS", { RMeBP, Iv64 } },
  938 + { "movS", { RMeSI, Iv64 } },
  939 + { "movS", { RMeDI, Iv64 } },
735 940 /* c0 */
736 941 { GRP2b },
737 942 { GRP2S },
738   - { "retT", Iw, XX, XX },
739   - { "retT", XX, XX, XX },
740   - { "les{S|}", Gv, Mp, XX },
741   - { "ldsS", Gv, Mp, XX },
742   - { "movA", Eb, Ib, XX },
743   - { "movQ", Ev, Iv, XX },
  943 + { "retT", { Iw } },
  944 + { "retT", { XX } },
  945 + { "les{S|}", { Gv, Mp } },
  946 + { "ldsS", { Gv, Mp } },
  947 + { GRP11_C6 },
  948 + { GRP11_C7 },
744 949 /* c8 */
745   - { "enterT", Iw, Ib, XX },
746   - { "leaveT", XX, XX, XX },
747   - { "lretP", Iw, XX, XX },
748   - { "lretP", XX, XX, XX },
749   - { "int3", XX, XX, XX },
750   - { "int", Ib, XX, XX },
751   - { "into{|}", XX, XX, XX },
752   - { "iretP", XX, XX, XX },
  950 + { "enterT", { Iw, Ib } },
  951 + { "leaveT", { XX } },
  952 + { "lretP", { Iw } },
  953 + { "lretP", { XX } },
  954 + { "int3", { XX } },
  955 + { "int", { Ib } },
  956 + { "into{|}", { XX } },
  957 + { "iretP", { XX } },
753 958 /* d0 */
754 959 { GRP2b_one },
755 960 { GRP2S_one },
756 961 { GRP2b_cl },
757 962 { GRP2S_cl },
758   - { "aam{|}", sIb, XX, XX },
759   - { "aad{|}", sIb, XX, XX },
760   - { "(bad)", XX, XX, XX },
761   - { "xlat", DSBX, XX, XX },
  963 + { "aam{|}", { sIb } },
  964 + { "aad{|}", { sIb } },
  965 + { "(bad)", { XX } },
  966 + { "xlat", { DSBX } },
762 967 /* d8 */
763 968 { FLOAT },
764 969 { FLOAT },
... ... @@ -769,39 +974,39 @@ static const struct dis386 dis386[] = {
769 974 { FLOAT },
770 975 { FLOAT },
771 976 /* e0 */
772   - { "loopneFH", Jb, XX, loop_jcxz_flag },
773   - { "loopeFH", Jb, XX, loop_jcxz_flag },
774   - { "loopFH", Jb, XX, loop_jcxz_flag },
775   - { "jEcxzH", Jb, XX, loop_jcxz_flag },
776   - { "inB", AL, Ib, XX },
777   - { "inS", eAX, Ib, XX },
778   - { "outB", Ib, AL, XX },
779   - { "outS", Ib, eAX, XX },
  977 + { "loopneFH", { Jb, XX, loop_jcxz_flag } },
  978 + { "loopeFH", { Jb, XX, loop_jcxz_flag } },
  979 + { "loopFH", { Jb, XX, loop_jcxz_flag } },
  980 + { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
  981 + { "inB", { AL, Ib } },
  982 + { "inG", { zAX, Ib } },
  983 + { "outB", { Ib, AL } },
  984 + { "outG", { Ib, zAX } },
780 985 /* e8 */
781   - { "callT", Jv, XX, XX },
782   - { "jmpT", Jv, XX, XX },
783   - { "Jjmp{T|}", Ap, XX, XX },
784   - { "jmp", Jb, XX, XX },
785   - { "inB", AL, indirDX, XX },
786   - { "inS", eAX, indirDX, XX },
787   - { "outB", indirDX, AL, XX },
788   - { "outS", indirDX, eAX, XX },
  986 + { "callT", { Jv } },
  987 + { "jmpT", { Jv } },
  988 + { "Jjmp{T|}", { Ap } },
  989 + { "jmp", { Jb } },
  990 + { "inB", { AL, indirDX } },
  991 + { "inG", { zAX, indirDX } },
  992 + { "outB", { indirDX, AL } },
  993 + { "outG", { indirDX, zAX } },
789 994 /* f0 */
790   - { "(bad)", XX, XX, XX }, /* lock prefix */
791   - { "icebp", XX, XX, XX },
792   - { "(bad)", XX, XX, XX }, /* repne */
793   - { "(bad)", XX, XX, XX }, /* repz */
794   - { "hlt", XX, XX, XX },
795   - { "cmc", XX, XX, XX },
  995 + { "(bad)", { XX } }, /* lock prefix */
  996 + { "icebp", { XX } },
  997 + { "(bad)", { XX } }, /* repne */
  998 + { "(bad)", { XX } }, /* repz */
  999 + { "hlt", { XX } },
  1000 + { "cmc", { XX } },
796 1001 { GRP3b },
797 1002 { GRP3S },
798 1003 /* f8 */
799   - { "clc", XX, XX, XX },
800   - { "stc", XX, XX, XX },
801   - { "cli", XX, XX, XX },
802   - { "sti", XX, XX, XX },
803   - { "cld", XX, XX, XX },
804   - { "std", XX, XX, XX },
  1004 + { "clc", { XX } },
  1005 + { "stc", { XX } },
  1006 + { "cli", { XX } },
  1007 + { "sti", { XX } },
  1008 + { "cld", { XX } },
  1009 + { "std", { XX } },
805 1010 { GRP4 },
806 1011 { GRP5 },
807 1012 };
... ... @@ -810,102 +1015,102 @@ static const struct dis386 dis386_twobyte[] = {
810 1015 /* 00 */
811 1016 { GRP6 },
812 1017 { GRP7 },
813   - { "larS", Gv, Ew, XX },
814   - { "lslS", Gv, Ew, XX },
815   - { "(bad)", XX, XX, XX },
816   - { "syscall", XX, XX, XX },
817   - { "clts", XX, XX, XX },
818   - { "sysretP", XX, XX, XX },
  1018 + { "larS", { Gv, Ew } },
  1019 + { "lslS", { Gv, Ew } },
  1020 + { "(bad)", { XX } },
  1021 + { "syscall", { XX } },
  1022 + { "clts", { XX } },
  1023 + { "sysretP", { XX } },
819 1024 /* 08 */
820   - { "invd", XX, XX, XX },
821   - { "wbinvd", XX, XX, XX },
822   - { "(bad)", XX, XX, XX },
823   - { "ud2a", XX, XX, XX },
824   - { "(bad)", XX, XX, XX },
  1025 + { "invd", { XX } },
  1026 + { "wbinvd", { XX } },
  1027 + { "(bad)", { XX } },
  1028 + { "ud2a", { XX } },
  1029 + { "(bad)", { XX } },
825 1030 { GRPAMD },
826   - { "femms", XX, XX, XX },
827   - { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
  1031 + { "femms", { XX } },
  1032 + { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
828 1033 /* 10 */
829 1034 { PREGRP8 },
830 1035 { PREGRP9 },
831 1036 { PREGRP30 },
832   - { "movlpX", EX, XM, SIMD_Fixup, 'h' },
833   - { "unpcklpX", XM, EX, XX },
834   - { "unpckhpX", XM, EX, XX },
  1037 + { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
  1038 + { "unpcklpX", { XM, EXq } },
  1039 + { "unpckhpX", { XM, EXq } },
835 1040 { PREGRP31 },
836   - { "movhpX", EX, XM, SIMD_Fixup, 'l' },
  1041 + { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
837 1042 /* 18 */
838   - { GRP14 },
839   - { "(bad)", XX, XX, XX },
840   - { "(bad)", XX, XX, XX },
841   - { "(bad)", XX, XX, XX },
842   - { "(bad)", XX, XX, XX },
843   - { "(bad)", XX, XX, XX },
844   - { "(bad)", XX, XX, XX },
845   - { "(bad)", XX, XX, XX },
  1043 + { GRP16 },
  1044 + { "(bad)", { XX } },
  1045 + { "(bad)", { XX } },
  1046 + { "(bad)", { XX } },
  1047 + { "(bad)", { XX } },
  1048 + { "(bad)", { XX } },
  1049 + { "(bad)", { XX } },
  1050 + { "nopQ", { Ev } },
846 1051 /* 20 */
847   - { "movZ", Rm, Cm, XX },
848   - { "movZ", Rm, Dm, XX },
849   - { "movZ", Cm, Rm, XX },
850   - { "movZ", Dm, Rm, XX },
851   - { "movL", Rd, Td, XX },
852   - { "(bad)", XX, XX, XX },
853   - { "movL", Td, Rd, XX },
854   - { "(bad)", XX, XX, XX },
  1052 + { "movZ", { Rm, Cm } },
  1053 + { "movZ", { Rm, Dm } },
  1054 + { "movZ", { Cm, Rm } },
  1055 + { "movZ", { Dm, Rm } },
  1056 + { "movL", { Rd, Td } },
  1057 + { "(bad)", { XX } },
  1058 + { "movL", { Td, Rd } },
  1059 + { "(bad)", { XX } },
855 1060 /* 28 */
856   - { "movapX", XM, EX, XX },
857   - { "movapX", EX, XM, XX },
  1061 + { "movapX", { XM, EXx } },
  1062 + { "movapX", { EXx, XM } },
858 1063 { PREGRP2 },
859   - { "movntpX", Ev, XM, XX },
  1064 + { PREGRP33 },
860 1065 { PREGRP4 },
861 1066 { PREGRP3 },
862   - { "ucomisX", XM,EX, XX },
863   - { "comisX", XM,EX, XX },
  1067 + { PREGRP93 },
  1068 + { PREGRP94 },
864 1069 /* 30 */
865   - { "wrmsr", XX, XX, XX },
866   - { "rdtsc", XX, XX, XX },
867   - { "rdmsr", XX, XX, XX },
868   - { "rdpmc", XX, XX, XX },
869   - { "sysenter", XX, XX, XX },
870   - { "sysexit", XX, XX, XX },
871   - { "(bad)", XX, XX, XX },
872   - { "(bad)", XX, XX, XX },
  1070 + { "wrmsr", { XX } },
  1071 + { "rdtsc", { XX } },
  1072 + { "rdmsr", { XX } },
  1073 + { "rdpmc", { XX } },
  1074 + { "sysenter", { XX } },
  1075 + { "sysexit", { XX } },
  1076 + { "(bad)", { XX } },
  1077 + { "(bad)", { XX } },
873 1078 /* 38 */
874 1079 { THREE_BYTE_0 },
875   - { "(bad)", XX, XX, XX },
  1080 + { "(bad)", { XX } },
876 1081 { THREE_BYTE_1 },
877   - { "(bad)", XX, XX, XX },
878   - { "(bad)", XX, XX, XX },
879   - { "(bad)", XX, XX, XX },
880   - { "(bad)", XX, XX, XX },
881   - { "(bad)", XX, XX, XX },
  1082 + { "(bad)", { XX } },
  1083 + { "(bad)", { XX } },
  1084 + { "(bad)", { XX } },
  1085 + { "(bad)", { XX } },
  1086 + { "(bad)", { XX } },
882 1087 /* 40 */
883   - { "cmovo", Gv, Ev, XX },
884   - { "cmovno", Gv, Ev, XX },
885   - { "cmovb", Gv, Ev, XX },
886   - { "cmovae", Gv, Ev, XX },
887   - { "cmove", Gv, Ev, XX },
888   - { "cmovne", Gv, Ev, XX },
889   - { "cmovbe", Gv, Ev, XX },
890   - { "cmova", Gv, Ev, XX },
  1088 + { "cmovo", { Gv, Ev } },
  1089 + { "cmovno", { Gv, Ev } },
  1090 + { "cmovb", { Gv, Ev } },
  1091 + { "cmovae", { Gv, Ev } },
  1092 + { "cmove", { Gv, Ev } },
  1093 + { "cmovne", { Gv, Ev } },
  1094 + { "cmovbe", { Gv, Ev } },
  1095 + { "cmova", { Gv, Ev } },
891 1096 /* 48 */
892   - { "cmovs", Gv, Ev, XX },
893   - { "cmovns", Gv, Ev, XX },
894   - { "cmovp", Gv, Ev, XX },
895   - { "cmovnp", Gv, Ev, XX },
896   - { "cmovl", Gv, Ev, XX },
897   - { "cmovge", Gv, Ev, XX },
898   - { "cmovle", Gv, Ev, XX },
899   - { "cmovg", Gv, Ev, XX },
  1097 + { "cmovs", { Gv, Ev } },
  1098 + { "cmovns", { Gv, Ev } },
  1099 + { "cmovp", { Gv, Ev } },
  1100 + { "cmovnp", { Gv, Ev } },
  1101 + { "cmovl", { Gv, Ev } },
  1102 + { "cmovge", { Gv, Ev } },
  1103 + { "cmovle", { Gv, Ev } },
  1104 + { "cmovg", { Gv, Ev } },
900 1105 /* 50 */
901   - { "movmskpX", Gdq, XS, XX },
  1106 + { "movmskpX", { Gdq, XS } },
902 1107 { PREGRP13 },
903 1108 { PREGRP12 },
904 1109 { PREGRP11 },
905   - { "andpX", XM, EX, XX },
906   - { "andnpX", XM, EX, XX },
907   - { "orpX", XM, EX, XX },
908   - { "xorpX", XM, EX, XX },
  1110 + { "andpX", { XM, EXx } },
  1111 + { "andnpX", { XM, EXx } },
  1112 + { "orpX", { XM, EXx } },
  1113 + { "xorpX", { XM, EXx } },
909 1114 /* 58 */
910 1115 { PREGRP0 },
911 1116 { PREGRP10 },
... ... @@ -916,185 +1121,185 @@ static const struct dis386 dis386_twobyte[] = {
916 1121 { PREGRP5 },
917 1122 { PREGRP6 },
918 1123 /* 60 */
919   - { "punpcklbw", MX, EM, XX },
920   - { "punpcklwd", MX, EM, XX },
921   - { "punpckldq", MX, EM, XX },
922   - { "packsswb", MX, EM, XX },
923   - { "pcmpgtb", MX, EM, XX },
924   - { "pcmpgtw", MX, EM, XX },
925   - { "pcmpgtd", MX, EM, XX },
926   - { "packuswb", MX, EM, XX },
  1124 + { PREGRP95 },
  1125 + { PREGRP96 },
  1126 + { PREGRP97 },
  1127 + { "packsswb", { MX, EM } },
  1128 + { "pcmpgtb", { MX, EM } },
  1129 + { "pcmpgtw", { MX, EM } },
  1130 + { "pcmpgtd", { MX, EM } },
  1131 + { "packuswb", { MX, EM } },
927 1132 /* 68 */
928   - { "punpckhbw", MX, EM, XX },
929   - { "punpckhwd", MX, EM, XX },
930   - { "punpckhdq", MX, EM, XX },
931   - { "packssdw", MX, EM, XX },
  1133 + { "punpckhbw", { MX, EM } },
  1134 + { "punpckhwd", { MX, EM } },
  1135 + { "punpckhdq", { MX, EM } },
  1136 + { "packssdw", { MX, EM } },
932 1137 { PREGRP26 },
933 1138 { PREGRP24 },
934   - { "movd", MX, Edq, XX },
  1139 + { "movd", { MX, Edq } },
935 1140 { PREGRP19 },
936 1141 /* 70 */
937 1142 { PREGRP22 },
938   - { GRP10 },
939   - { GRP11 },
940 1143 { GRP12 },
941   - { "pcmpeqb", MX, EM, XX },
942   - { "pcmpeqw", MX, EM, XX },
943   - { "pcmpeqd", MX, EM, XX },
944   - { "emms", XX, XX, XX },
  1144 + { GRP13 },
  1145 + { GRP14 },
  1146 + { "pcmpeqb", { MX, EM } },
  1147 + { "pcmpeqw", { MX, EM } },
  1148 + { "pcmpeqd", { MX, EM } },
  1149 + { "emms", { XX } },
945 1150 /* 78 */
946   - { "vmread", Em, Gm, XX },
947   - { "vmwrite", Gm, Em, XX },
948   - { "(bad)", XX, XX, XX },
949   - { "(bad)", XX, XX, XX },
  1151 + { PREGRP34 },
  1152 + { PREGRP35 },
  1153 + { "(bad)", { XX } },
  1154 + { "(bad)", { XX } },
950 1155 { PREGRP28 },
951 1156 { PREGRP29 },
952 1157 { PREGRP23 },
953 1158 { PREGRP20 },
954 1159 /* 80 */
955   - { "joH", Jv, XX, cond_jump_flag },
956   - { "jnoH", Jv, XX, cond_jump_flag },
957   - { "jbH", Jv, XX, cond_jump_flag },
958   - { "jaeH", Jv, XX, cond_jump_flag },
959   - { "jeH", Jv, XX, cond_jump_flag },
960   - { "jneH", Jv, XX, cond_jump_flag },
961   - { "jbeH", Jv, XX, cond_jump_flag },
962   - { "jaH", Jv, XX, cond_jump_flag },
  1160 + { "joH", { Jv, XX, cond_jump_flag } },
  1161 + { "jnoH", { Jv, XX, cond_jump_flag } },
  1162 + { "jbH", { Jv, XX, cond_jump_flag } },
  1163 + { "jaeH", { Jv, XX, cond_jump_flag } },
  1164 + { "jeH", { Jv, XX, cond_jump_flag } },
  1165 + { "jneH", { Jv, XX, cond_jump_flag } },
  1166 + { "jbeH", { Jv, XX, cond_jump_flag } },
  1167 + { "jaH", { Jv, XX, cond_jump_flag } },
963 1168 /* 88 */
964   - { "jsH", Jv, XX, cond_jump_flag },
965   - { "jnsH", Jv, XX, cond_jump_flag },
966   - { "jpH", Jv, XX, cond_jump_flag },
967   - { "jnpH", Jv, XX, cond_jump_flag },
968   - { "jlH", Jv, XX, cond_jump_flag },
969   - { "jgeH", Jv, XX, cond_jump_flag },
970   - { "jleH", Jv, XX, cond_jump_flag },
971   - { "jgH", Jv, XX, cond_jump_flag },
  1169 + { "jsH", { Jv, XX, cond_jump_flag } },
  1170 + { "jnsH", { Jv, XX, cond_jump_flag } },
  1171 + { "jpH", { Jv, XX, cond_jump_flag } },
  1172 + { "jnpH", { Jv, XX, cond_jump_flag } },
  1173 + { "jlH", { Jv, XX, cond_jump_flag } },
  1174 + { "jgeH", { Jv, XX, cond_jump_flag } },
  1175 + { "jleH", { Jv, XX, cond_jump_flag } },
  1176 + { "jgH", { Jv, XX, cond_jump_flag } },
972 1177 /* 90 */
973   - { "seto", Eb, XX, XX },
974   - { "setno", Eb, XX, XX },
975   - { "setb", Eb, XX, XX },
976   - { "setae", Eb, XX, XX },
977   - { "sete", Eb, XX, XX },
978   - { "setne", Eb, XX, XX },
979   - { "setbe", Eb, XX, XX },
980   - { "seta", Eb, XX, XX },
  1178 + { "seto", { Eb } },
  1179 + { "setno", { Eb } },
  1180 + { "setb", { Eb } },
  1181 + { "setae", { Eb } },
  1182 + { "sete", { Eb } },
  1183 + { "setne", { Eb } },
  1184 + { "setbe", { Eb } },
  1185 + { "seta", { Eb } },
981 1186 /* 98 */
982   - { "sets", Eb, XX, XX },
983   - { "setns", Eb, XX, XX },
984   - { "setp", Eb, XX, XX },
985   - { "setnp", Eb, XX, XX },
986   - { "setl", Eb, XX, XX },
987   - { "setge", Eb, XX, XX },
988   - { "setle", Eb, XX, XX },
989   - { "setg", Eb, XX, XX },
  1187 + { "sets", { Eb } },
  1188 + { "setns", { Eb } },
  1189 + { "setp", { Eb } },
  1190 + { "setnp", { Eb } },
  1191 + { "setl", { Eb } },
  1192 + { "setge", { Eb } },
  1193 + { "setle", { Eb } },
  1194 + { "setg", { Eb } },
990 1195 /* a0 */
991   - { "pushT", fs, XX, XX },
992   - { "popT", fs, XX, XX },
993   - { "cpuid", XX, XX, XX },
994   - { "btS", Ev, Gv, XX },
995   - { "shldS", Ev, Gv, Ib },
996   - { "shldS", Ev, Gv, CL },
  1196 + { "pushT", { fs } },
  1197 + { "popT", { fs } },
  1198 + { "cpuid", { XX } },
  1199 + { "btS", { Ev, Gv } },
  1200 + { "shldS", { Ev, Gv, Ib } },
  1201 + { "shldS", { Ev, Gv, CL } },
997 1202 { GRPPADLCK2 },
998 1203 { GRPPADLCK1 },
999 1204 /* a8 */
1000   - { "pushT", gs, XX, XX },
1001   - { "popT", gs, XX, XX },
1002   - { "rsm", XX, XX, XX },
1003   - { "btsS", Ev, Gv, XX },
1004   - { "shrdS", Ev, Gv, Ib },
1005   - { "shrdS", Ev, Gv, CL },
1006   - { GRP13 },
1007   - { "imulS", Gv, Ev, XX },
  1205 + { "pushT", { gs } },
  1206 + { "popT", { gs } },
  1207 + { "rsm", { XX } },
  1208 + { "btsS", { Ev, Gv } },
  1209 + { "shrdS", { Ev, Gv, Ib } },
  1210 + { "shrdS", { Ev, Gv, CL } },
  1211 + { GRP15 },
  1212 + { "imulS", { Gv, Ev } },
1008 1213 /* b0 */
1009   - { "cmpxchgB", Eb, Gb, XX },
1010   - { "cmpxchgS", Ev, Gv, XX },
1011   - { "lssS", Gv, Mp, XX },
1012   - { "btrS", Ev, Gv, XX },
1013   - { "lfsS", Gv, Mp, XX },
1014   - { "lgsS", Gv, Mp, XX },
1015   - { "movz{bR|x|bR|x}", Gv, Eb, XX },
1016   - { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
  1214 + { "cmpxchgB", { Eb, Gb } },
  1215 + { "cmpxchgS", { Ev, Gv } },
  1216 + { "lssS", { Gv, Mp } },
  1217 + { "btrS", { Ev, Gv } },
  1218 + { "lfsS", { Gv, Mp } },
  1219 + { "lgsS", { Gv, Mp } },
  1220 + { "movz{bR|x|bR|x}", { Gv, Eb } },
  1221 + { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1017 1222 /* b8 */
1018   - { "(bad)", XX, XX, XX },
1019   - { "ud2b", XX, XX, XX },
  1223 + { PREGRP37 },
  1224 + { "ud2b", { XX } },
1020 1225 { GRP8 },
1021   - { "btcS", Ev, Gv, XX },
1022   - { "bsfS", Gv, Ev, XX },
1023   - { "bsrS", Gv, Ev, XX },
1024   - { "movs{bR|x|bR|x}", Gv, Eb, XX },
1025   - { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
  1226 + { "btcS", { Ev, Gv } },
  1227 + { "bsfS", { Gv, Ev } },
  1228 + { PREGRP36 },
  1229 + { "movs{bR|x|bR|x}", { Gv, Eb } },
  1230 + { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1026 1231 /* c0 */
1027   - { "xaddB", Eb, Gb, XX },
1028   - { "xaddS", Ev, Gv, XX },
  1232 + { "xaddB", { Eb, Gb } },
  1233 + { "xaddS", { Ev, Gv } },
1029 1234 { PREGRP1 },
1030   - { "movntiS", Ev, Gv, XX },
1031   - { "pinsrw", MX, Edqw, Ib },
1032   - { "pextrw", Gdq, MS, Ib },
1033   - { "shufpX", XM, EX, Ib },
  1235 + { "movntiS", { Ev, Gv } },
  1236 + { "pinsrw", { MX, Edqw, Ib } },
  1237 + { "pextrw", { Gdq, MS, Ib } },
  1238 + { "shufpX", { XM, EXx, Ib } },
1034 1239 { GRP9 },
1035 1240 /* c8 */
1036   - { "bswap", RMeAX, XX, XX },
1037   - { "bswap", RMeCX, XX, XX },
1038   - { "bswap", RMeDX, XX, XX },
1039   - { "bswap", RMeBX, XX, XX },
1040   - { "bswap", RMeSP, XX, XX },
1041   - { "bswap", RMeBP, XX, XX },
1042   - { "bswap", RMeSI, XX, XX },
1043   - { "bswap", RMeDI, XX, XX },
  1241 + { "bswap", { RMeAX } },
  1242 + { "bswap", { RMeCX } },
  1243 + { "bswap", { RMeDX } },
  1244 + { "bswap", { RMeBX } },
  1245 + { "bswap", { RMeSP } },
  1246 + { "bswap", { RMeBP } },
  1247 + { "bswap", { RMeSI } },
  1248 + { "bswap", { RMeDI } },
1044 1249 /* d0 */
1045 1250 { PREGRP27 },
1046   - { "psrlw", MX, EM, XX },
1047   - { "psrld", MX, EM, XX },
1048   - { "psrlq", MX, EM, XX },
1049   - { "paddq", MX, EM, XX },
1050   - { "pmullw", MX, EM, XX },
  1251 + { "psrlw", { MX, EM } },
  1252 + { "psrld", { MX, EM } },
  1253 + { "psrlq", { MX, EM } },
  1254 + { "paddq", { MX, EM } },
  1255 + { "pmullw", { MX, EM } },
1051 1256 { PREGRP21 },
1052   - { "pmovmskb", Gdq, MS, XX },
  1257 + { "pmovmskb", { Gdq, MS } },
1053 1258 /* d8 */
1054   - { "psubusb", MX, EM, XX },
1055   - { "psubusw", MX, EM, XX },
1056   - { "pminub", MX, EM, XX },
1057   - { "pand", MX, EM, XX },
1058   - { "paddusb", MX, EM, XX },
1059   - { "paddusw", MX, EM, XX },
1060   - { "pmaxub", MX, EM, XX },
1061   - { "pandn", MX, EM, XX },
  1259 + { "psubusb", { MX, EM } },
  1260 + { "psubusw", { MX, EM } },
  1261 + { "pminub", { MX, EM } },
  1262 + { "pand", { MX, EM } },
  1263 + { "paddusb", { MX, EM } },
  1264 + { "paddusw", { MX, EM } },
  1265 + { "pmaxub", { MX, EM } },
  1266 + { "pandn", { MX, EM } },
1062 1267 /* e0 */
1063   - { "pavgb", MX, EM, XX },
1064   - { "psraw", MX, EM, XX },
1065   - { "psrad", MX, EM, XX },
1066   - { "pavgw", MX, EM, XX },
1067   - { "pmulhuw", MX, EM, XX },
1068   - { "pmulhw", MX, EM, XX },
  1268 + { "pavgb", { MX, EM } },
  1269 + { "psraw", { MX, EM } },
  1270 + { "psrad", { MX, EM } },
  1271 + { "pavgw", { MX, EM } },
  1272 + { "pmulhuw", { MX, EM } },
  1273 + { "pmulhw", { MX, EM } },
1069 1274 { PREGRP15 },
1070 1275 { PREGRP25 },
1071 1276 /* e8 */
1072   - { "psubsb", MX, EM, XX },
1073   - { "psubsw", MX, EM, XX },
1074   - { "pminsw", MX, EM, XX },
1075   - { "por", MX, EM, XX },
1076   - { "paddsb", MX, EM, XX },
1077   - { "paddsw", MX, EM, XX },
1078   - { "pmaxsw", MX, EM, XX },
1079   - { "pxor", MX, EM, XX },
  1277 + { "psubsb", { MX, EM } },
  1278 + { "psubsw", { MX, EM } },
  1279 + { "pminsw", { MX, EM } },
  1280 + { "por", { MX, EM } },
  1281 + { "paddsb", { MX, EM } },
  1282 + { "paddsw", { MX, EM } },
  1283 + { "pmaxsw", { MX, EM } },
  1284 + { "pxor", { MX, EM } },
1080 1285 /* f0 */
1081 1286 { PREGRP32 },
1082   - { "psllw", MX, EM, XX },
1083   - { "pslld", MX, EM, XX },
1084   - { "psllq", MX, EM, XX },
1085   - { "pmuludq", MX, EM, XX },
1086   - { "pmaddwd", MX, EM, XX },
1087   - { "psadbw", MX, EM, XX },
  1287 + { "psllw", { MX, EM } },
  1288 + { "pslld", { MX, EM } },
  1289 + { "psllq", { MX, EM } },
  1290 + { "pmuludq", { MX, EM } },
  1291 + { "pmaddwd", { MX, EM } },
  1292 + { "psadbw", { MX, EM } },
1088 1293 { PREGRP18 },
1089 1294 /* f8 */
1090   - { "psubb", MX, EM, XX },
1091   - { "psubw", MX, EM, XX },
1092   - { "psubd", MX, EM, XX },
1093   - { "psubq", MX, EM, XX },
1094   - { "paddb", MX, EM, XX },
1095   - { "paddw", MX, EM, XX },
1096   - { "paddd", MX, EM, XX },
1097   - { "(bad)", XX, XX, XX }
  1295 + { "psubb", { MX, EM } },
  1296 + { "psubw", { MX, EM } },
  1297 + { "psubd", { MX, EM } },
  1298 + { "psubq", { MX, EM } },
  1299 + { "paddb", { MX, EM } },
  1300 + { "paddw", { MX, EM } },
  1301 + { "paddd", { MX, EM } },
  1302 + { "(bad)", { XX } },
1098 1303 };
1099 1304  
1100 1305 static const unsigned char onebyte_has_modrm[256] = {
... ... @@ -1124,7 +1329,7 @@ static const unsigned char twobyte_has_modrm[256] = {
1124 1329 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1125 1330 /* ------------------------------- */
1126 1331 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1127   - /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
  1332 + /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1128 1333 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1129 1334 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1130 1335 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
... ... @@ -1134,7 +1339,7 @@ static const unsigned char twobyte_has_modrm[256] = {
1134 1339 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1135 1340 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1136 1341 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1137   - /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
  1342 + /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1138 1343 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1139 1344 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1140 1345 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
... ... @@ -1143,17 +1348,17 @@ static const unsigned char twobyte_has_modrm[256] = {
1143 1348 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1144 1349 };
1145 1350  
1146   -static const unsigned char twobyte_uses_SSE_prefix[256] = {
  1351 +static const unsigned char twobyte_uses_DATA_prefix[256] = {
1147 1352 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1148 1353 /* ------------------------------- */
1149 1354 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1150 1355 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1151   - /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
  1356 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1152 1357 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1153 1358 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1154 1359 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1155 1360 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1156   - /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
  1361 + /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1157 1362 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1158 1363 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1159 1364 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
... ... @@ -1166,6 +1371,196 @@ static const unsigned char twobyte_uses_SSE_prefix[256] = {
1166 1371 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1167 1372 };
1168 1373  
  1374 +static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
  1375 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1376 + /* ------------------------------- */
  1377 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1378 + /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
  1379 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
  1380 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1381 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1382 + /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
  1383 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1384 + /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
  1385 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1386 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1387 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1388 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1389 + /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1390 + /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
  1391 + /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
  1392 + /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1393 + /* ------------------------------- */
  1394 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1395 +};
  1396 +
  1397 +static const unsigned char twobyte_uses_REPZ_prefix[256] = {
  1398 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1399 + /* ------------------------------- */
  1400 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1401 + /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
  1402 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
  1403 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1404 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1405 + /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
  1406 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
  1407 + /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
  1408 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1409 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1410 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1411 + /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
  1412 + /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1413 + /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
  1414 + /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
  1415 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1416 + /* ------------------------------- */
  1417 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1418 +};
  1419 +
  1420 +/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
  1421 +static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
  1422 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1423 + /* ------------------------------- */
  1424 + /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
  1425 + /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
  1426 + /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
  1427 + /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
  1428 + /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1429 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1430 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1431 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1432 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1433 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1434 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1435 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1436 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1437 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1438 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1439 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1440 + /* ------------------------------- */
  1441 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1442 +};
  1443 +
  1444 +/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
  1445 +static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
  1446 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1447 + /* ------------------------------- */
  1448 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1449 + /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
  1450 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
  1451 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1452 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1453 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1454 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1455 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1456 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1457 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1458 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1459 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1460 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1461 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1462 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1463 + /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1464 + /* ------------------------------- */
  1465 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1466 +};
  1467 +
  1468 +/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
  1469 +static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
  1470 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1471 + /* ------------------------------- */
  1472 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1473 + /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
  1474 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
  1475 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1476 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1477 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1478 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1479 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1480 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1481 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1482 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1483 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1484 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1485 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1486 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1487 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1488 + /* ------------------------------- */
  1489 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1490 +};
  1491 +
  1492 +/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
  1493 +static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
  1494 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1495 + /* ------------------------------- */
  1496 + /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
  1497 + /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
  1498 + /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
  1499 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1500 + /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1501 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1502 + /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1503 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1504 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1505 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1506 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1507 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1508 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1509 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1510 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1511 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1512 + /* ------------------------------- */
  1513 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1514 +};
  1515 +
  1516 +/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
  1517 +static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
  1518 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1519 + /* ------------------------------- */
  1520 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1521 + /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
  1522 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
  1523 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1524 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1525 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1526 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1527 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1528 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1529 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1530 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1531 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1532 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1533 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1534 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1535 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1536 + /* ------------------------------- */
  1537 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1538 +};
  1539 +
  1540 +/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
  1541 +static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
  1542 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1543 + /* ------------------------------- */
  1544 + /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
  1545 + /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
  1546 + /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
  1547 + /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
  1548 + /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
  1549 + /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
  1550 + /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
  1551 + /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
  1552 + /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
  1553 + /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
  1554 + /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
  1555 + /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
  1556 + /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
  1557 + /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
  1558 + /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
  1559 + /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
  1560 + /* ------------------------------- */
  1561 + /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
  1562 +};
  1563 +
1169 1564 static char obuf[100];
1170 1565 static char *obufp;
1171 1566 static char scratchbuf[100];
... ... @@ -1173,9 +1568,13 @@ static unsigned char *start_codep;
1173 1568 static unsigned char *insn_codep;
1174 1569 static unsigned char *codep;
1175 1570 static disassemble_info *the_info;
1176   -static int mod;
1177   -static int rm;
1178   -static int reg;
  1571 +static struct
  1572 + {
  1573 + int mod;
  1574 + int reg;
  1575 + int rm;
  1576 + }
  1577 +modrm;
1179 1578 static unsigned char need_modrm;
1180 1579  
1181 1580 /* If we are accessing mod/rm/reg without need_modrm set, then the
... ... @@ -1244,595 +1643,1671 @@ static const char * const att_index16[] = {
1244 1643 };
1245 1644  
1246 1645 static const struct dis386 grps[][8] = {
  1646 + /* GRP1a */
  1647 + {
  1648 + { "popU", { stackEv } },
  1649 + { "(bad)", { XX } },
  1650 + { "(bad)", { XX } },
  1651 + { "(bad)", { XX } },
  1652 + { "(bad)", { XX } },
  1653 + { "(bad)", { XX } },
  1654 + { "(bad)", { XX } },
  1655 + { "(bad)", { XX } },
  1656 + },
1247 1657 /* GRP1b */
1248 1658 {
1249   - { "addA", Eb, Ib, XX },
1250   - { "orA", Eb, Ib, XX },
1251   - { "adcA", Eb, Ib, XX },
1252   - { "sbbA", Eb, Ib, XX },
1253   - { "andA", Eb, Ib, XX },
1254   - { "subA", Eb, Ib, XX },
1255   - { "xorA", Eb, Ib, XX },
1256   - { "cmpA", Eb, Ib, XX }
  1659 + { "addA", { Eb, Ib } },
  1660 + { "orA", { Eb, Ib } },
  1661 + { "adcA", { Eb, Ib } },
  1662 + { "sbbA", { Eb, Ib } },
  1663 + { "andA", { Eb, Ib } },
  1664 + { "subA", { Eb, Ib } },
  1665 + { "xorA", { Eb, Ib } },
  1666 + { "cmpA", { Eb, Ib } },
1257 1667 },
1258 1668 /* GRP1S */
1259 1669 {
1260   - { "addQ", Ev, Iv, XX },
1261   - { "orQ", Ev, Iv, XX },
1262   - { "adcQ", Ev, Iv, XX },
1263   - { "sbbQ", Ev, Iv, XX },
1264   - { "andQ", Ev, Iv, XX },
1265   - { "subQ", Ev, Iv, XX },
1266   - { "xorQ", Ev, Iv, XX },
1267   - { "cmpQ", Ev, Iv, XX }
  1670 + { "addQ", { Ev, Iv } },
  1671 + { "orQ", { Ev, Iv } },
  1672 + { "adcQ", { Ev, Iv } },
  1673 + { "sbbQ", { Ev, Iv } },
  1674 + { "andQ", { Ev, Iv } },
  1675 + { "subQ", { Ev, Iv } },
  1676 + { "xorQ", { Ev, Iv } },
  1677 + { "cmpQ", { Ev, Iv } },
1268 1678 },
1269 1679 /* GRP1Ss */
1270 1680 {
1271   - { "addQ", Ev, sIb, XX },
1272   - { "orQ", Ev, sIb, XX },
1273   - { "adcQ", Ev, sIb, XX },
1274   - { "sbbQ", Ev, sIb, XX },
1275   - { "andQ", Ev, sIb, XX },
1276   - { "subQ", Ev, sIb, XX },
1277   - { "xorQ", Ev, sIb, XX },
1278   - { "cmpQ", Ev, sIb, XX }
  1681 + { "addQ", { Ev, sIb } },
  1682 + { "orQ", { Ev, sIb } },
  1683 + { "adcQ", { Ev, sIb } },
  1684 + { "sbbQ", { Ev, sIb } },
  1685 + { "andQ", { Ev, sIb } },
  1686 + { "subQ", { Ev, sIb } },
  1687 + { "xorQ", { Ev, sIb } },
  1688 + { "cmpQ", { Ev, sIb } },
1279 1689 },
1280 1690 /* GRP2b */
1281 1691 {
1282   - { "rolA", Eb, Ib, XX },
1283   - { "rorA", Eb, Ib, XX },
1284   - { "rclA", Eb, Ib, XX },
1285   - { "rcrA", Eb, Ib, XX },
1286   - { "shlA", Eb, Ib, XX },
1287   - { "shrA", Eb, Ib, XX },
1288   - { "(bad)", XX, XX, XX },
1289   - { "sarA", Eb, Ib, XX },
  1692 + { "rolA", { Eb, Ib } },
  1693 + { "rorA", { Eb, Ib } },
  1694 + { "rclA", { Eb, Ib } },
  1695 + { "rcrA", { Eb, Ib } },
  1696 + { "shlA", { Eb, Ib } },
  1697 + { "shrA", { Eb, Ib } },
  1698 + { "(bad)", { XX } },
  1699 + { "sarA", { Eb, Ib } },
1290 1700 },
1291 1701 /* GRP2S */
1292 1702 {
1293   - { "rolQ", Ev, Ib, XX },
1294   - { "rorQ", Ev, Ib, XX },
1295   - { "rclQ", Ev, Ib, XX },
1296   - { "rcrQ", Ev, Ib, XX },
1297   - { "shlQ", Ev, Ib, XX },
1298   - { "shrQ", Ev, Ib, XX },
1299   - { "(bad)", XX, XX, XX },
1300   - { "sarQ", Ev, Ib, XX },
  1703 + { "rolQ", { Ev, Ib } },
  1704 + { "rorQ", { Ev, Ib } },
  1705 + { "rclQ", { Ev, Ib } },
  1706 + { "rcrQ", { Ev, Ib } },
  1707 + { "shlQ", { Ev, Ib } },
  1708 + { "shrQ", { Ev, Ib } },
  1709 + { "(bad)", { XX } },
  1710 + { "sarQ", { Ev, Ib } },
1301 1711 },
1302 1712 /* GRP2b_one */
1303 1713 {
1304   - { "rolA", Eb, I1, XX },
1305   - { "rorA", Eb, I1, XX },
1306   - { "rclA", Eb, I1, XX },
1307   - { "rcrA", Eb, I1, XX },
1308   - { "shlA", Eb, I1, XX },
1309   - { "shrA", Eb, I1, XX },
1310   - { "(bad)", XX, XX, XX },
1311   - { "sarA", Eb, I1, XX },
  1714 + { "rolA", { Eb, I1 } },
  1715 + { "rorA", { Eb, I1 } },
  1716 + { "rclA", { Eb, I1 } },
  1717 + { "rcrA", { Eb, I1 } },
  1718 + { "shlA", { Eb, I1 } },
  1719 + { "shrA", { Eb, I1 } },
  1720 + { "(bad)", { XX } },
  1721 + { "sarA", { Eb, I1 } },
1312 1722 },
1313 1723 /* GRP2S_one */
1314 1724 {
1315   - { "rolQ", Ev, I1, XX },
1316   - { "rorQ", Ev, I1, XX },
1317   - { "rclQ", Ev, I1, XX },
1318   - { "rcrQ", Ev, I1, XX },
1319   - { "shlQ", Ev, I1, XX },
1320   - { "shrQ", Ev, I1, XX },
1321   - { "(bad)", XX, XX, XX},
1322   - { "sarQ", Ev, I1, XX },
  1725 + { "rolQ", { Ev, I1 } },
  1726 + { "rorQ", { Ev, I1 } },
  1727 + { "rclQ", { Ev, I1 } },
  1728 + { "rcrQ", { Ev, I1 } },
  1729 + { "shlQ", { Ev, I1 } },
  1730 + { "shrQ", { Ev, I1 } },
  1731 + { "(bad)", { XX } },
  1732 + { "sarQ", { Ev, I1 } },
1323 1733 },
1324 1734 /* GRP2b_cl */
1325 1735 {
1326   - { "rolA", Eb, CL, XX },
1327   - { "rorA", Eb, CL, XX },
1328   - { "rclA", Eb, CL, XX },
1329   - { "rcrA", Eb, CL, XX },
1330   - { "shlA", Eb, CL, XX },
1331   - { "shrA", Eb, CL, XX },
1332   - { "(bad)", XX, XX, XX },
1333   - { "sarA", Eb, CL, XX },
  1736 + { "rolA", { Eb, CL } },
  1737 + { "rorA", { Eb, CL } },
  1738 + { "rclA", { Eb, CL } },
  1739 + { "rcrA", { Eb, CL } },
  1740 + { "shlA", { Eb, CL } },
  1741 + { "shrA", { Eb, CL } },
  1742 + { "(bad)", { XX } },
  1743 + { "sarA", { Eb, CL } },
1334 1744 },
1335 1745 /* GRP2S_cl */
1336 1746 {
1337   - { "rolQ", Ev, CL, XX },
1338   - { "rorQ", Ev, CL, XX },
1339   - { "rclQ", Ev, CL, XX },
1340   - { "rcrQ", Ev, CL, XX },
1341   - { "shlQ", Ev, CL, XX },
1342   - { "shrQ", Ev, CL, XX },
1343   - { "(bad)", XX, XX, XX },
1344   - { "sarQ", Ev, CL, XX }
  1747 + { "rolQ", { Ev, CL } },
  1748 + { "rorQ", { Ev, CL } },
  1749 + { "rclQ", { Ev, CL } },
  1750 + { "rcrQ", { Ev, CL } },
  1751 + { "shlQ", { Ev, CL } },
  1752 + { "shrQ", { Ev, CL } },
  1753 + { "(bad)", { XX } },
  1754 + { "sarQ", { Ev, CL } },
1345 1755 },
1346 1756 /* GRP3b */
1347 1757 {
1348   - { "testA", Eb, Ib, XX },
1349   - { "(bad)", Eb, XX, XX },
1350   - { "notA", Eb, XX, XX },
1351   - { "negA", Eb, XX, XX },
1352   - { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1353   - { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1354   - { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1355   - { "idivA", Eb, XX, XX } /* and idiv for consistency. */
  1758 + { "testA", { Eb, Ib } },
  1759 + { "(bad)", { Eb } },
  1760 + { "notA", { Eb } },
  1761 + { "negA", { Eb } },
  1762 + { "mulA", { Eb } }, /* Don't print the implicit %al register, */
  1763 + { "imulA", { Eb } }, /* to distinguish these opcodes from other */
  1764 + { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
  1765 + { "idivA", { Eb } }, /* and idiv for consistency. */
1356 1766 },
1357 1767 /* GRP3S */
1358 1768 {
1359   - { "testQ", Ev, Iv, XX },
1360   - { "(bad)", XX, XX, XX },
1361   - { "notQ", Ev, XX, XX },
1362   - { "negQ", Ev, XX, XX },
1363   - { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1364   - { "imulQ", Ev, XX, XX },
1365   - { "divQ", Ev, XX, XX },
1366   - { "idivQ", Ev, XX, XX },
  1769 + { "testQ", { Ev, Iv } },
  1770 + { "(bad)", { XX } },
  1771 + { "notQ", { Ev } },
  1772 + { "negQ", { Ev } },
  1773 + { "mulQ", { Ev } }, /* Don't print the implicit register. */
  1774 + { "imulQ", { Ev } },
  1775 + { "divQ", { Ev } },
  1776 + { "idivQ", { Ev } },
1367 1777 },
1368 1778 /* GRP4 */
1369 1779 {
1370   - { "incA", Eb, XX, XX },
1371   - { "decA", Eb, XX, XX },
1372   - { "(bad)", XX, XX, XX },
1373   - { "(bad)", XX, XX, XX },
1374   - { "(bad)", XX, XX, XX },
1375   - { "(bad)", XX, XX, XX },
1376   - { "(bad)", XX, XX, XX },
1377   - { "(bad)", XX, XX, XX },
  1780 + { "incA", { Eb } },
  1781 + { "decA", { Eb } },
  1782 + { "(bad)", { XX } },
  1783 + { "(bad)", { XX } },
  1784 + { "(bad)", { XX } },
  1785 + { "(bad)", { XX } },
  1786 + { "(bad)", { XX } },
  1787 + { "(bad)", { XX } },
1378 1788 },
1379 1789 /* GRP5 */
1380 1790 {
1381   - { "incQ", Ev, XX, XX },
1382   - { "decQ", Ev, XX, XX },
1383   - { "callT", indirEv, XX, XX },
1384   - { "JcallT", indirEp, XX, XX },
1385   - { "jmpT", indirEv, XX, XX },
1386   - { "JjmpT", indirEp, XX, XX },
1387   - { "pushU", stackEv, XX, XX },
1388   - { "(bad)", XX, XX, XX },
  1791 + { "incQ", { Ev } },
  1792 + { "decQ", { Ev } },
  1793 + { "callT", { indirEv } },
  1794 + { "JcallT", { indirEp } },
  1795 + { "jmpT", { indirEv } },
  1796 + { "JjmpT", { indirEp } },
  1797 + { "pushU", { stackEv } },
  1798 + { "(bad)", { XX } },
1389 1799 },
1390 1800 /* GRP6 */
1391 1801 {
1392   - { "sldtQ", Ev, XX, XX },
1393   - { "strQ", Ev, XX, XX },
1394   - { "lldt", Ew, XX, XX },
1395   - { "ltr", Ew, XX, XX },
1396   - { "verr", Ew, XX, XX },
1397   - { "verw", Ew, XX, XX },
1398   - { "(bad)", XX, XX, XX },
1399   - { "(bad)", XX, XX, XX }
  1802 + { "sldtD", { Sv } },
  1803 + { "strD", { Sv } },
  1804 + { "lldt", { Ew } },
  1805 + { "ltr", { Ew } },
  1806 + { "verr", { Ew } },
  1807 + { "verw", { Ew } },
  1808 + { "(bad)", { XX } },
  1809 + { "(bad)", { XX } },
1400 1810 },
1401 1811 /* GRP7 */
1402 1812 {
1403   - { "sgdtIQ", VMX_Fixup, 0, XX, XX },
1404   - { "sidtIQ", PNI_Fixup, 0, XX, XX },
1405   - { "lgdt{Q|Q||}", M, XX, XX },
1406   - { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
1407   - { "smswQ", Ev, XX, XX },
1408   - { "(bad)", XX, XX, XX },
1409   - { "lmsw", Ew, XX, XX },
1410   - { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
  1813 + { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
  1814 + { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
  1815 + { "lgdt{Q|Q||}", { M } },
  1816 + { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
  1817 + { "smswD", { Sv } },
  1818 + { "(bad)", { XX } },
  1819 + { "lmsw", { Ew } },
  1820 + { "invlpg", { { INVLPG_Fixup, w_mode } } },
1411 1821 },
1412 1822 /* GRP8 */
1413 1823 {
1414   - { "(bad)", XX, XX, XX },
1415   - { "(bad)", XX, XX, XX },
1416   - { "(bad)", XX, XX, XX },
1417   - { "(bad)", XX, XX, XX },
1418   - { "btQ", Ev, Ib, XX },
1419   - { "btsQ", Ev, Ib, XX },
1420   - { "btrQ", Ev, Ib, XX },
1421   - { "btcQ", Ev, Ib, XX },
  1824 + { "(bad)", { XX } },
  1825 + { "(bad)", { XX } },
  1826 + { "(bad)", { XX } },
  1827 + { "(bad)", { XX } },
  1828 + { "btQ", { Ev, Ib } },
  1829 + { "btsQ", { Ev, Ib } },
  1830 + { "btrQ", { Ev, Ib } },
  1831 + { "btcQ", { Ev, Ib } },
1422 1832 },
1423 1833 /* GRP9 */
1424 1834 {
1425   - { "(bad)", XX, XX, XX },
1426   - { "cmpxchg8b", Eq, XX, XX },
1427   - { "(bad)", XX, XX, XX },
1428   - { "(bad)", XX, XX, XX },
1429   - { "(bad)", XX, XX, XX },
1430   - { "(bad)", XX, XX, XX },
1431   - { "", VM, XX, XX }, /* See OP_VMX. */
1432   - { "vmptrst", Eq, XX, XX },
1433   - },
1434   - /* GRP10 */
1435   - {
1436   - { "(bad)", XX, XX, XX },
1437   - { "(bad)", XX, XX, XX },
1438   - { "psrlw", MS, Ib, XX },
1439   - { "(bad)", XX, XX, XX },
1440   - { "psraw", MS, Ib, XX },
1441   - { "(bad)", XX, XX, XX },
1442   - { "psllw", MS, Ib, XX },
1443   - { "(bad)", XX, XX, XX },
1444   - },
1445   - /* GRP11 */
1446   - {
1447   - { "(bad)", XX, XX, XX },
1448   - { "(bad)", XX, XX, XX },
1449   - { "psrld", MS, Ib, XX },
1450   - { "(bad)", XX, XX, XX },
1451   - { "psrad", MS, Ib, XX },
1452   - { "(bad)", XX, XX, XX },
1453   - { "pslld", MS, Ib, XX },
1454   - { "(bad)", XX, XX, XX },
  1835 + { "(bad)", { XX } },
  1836 + { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
  1837 + { "(bad)", { XX } },
  1838 + { "(bad)", { XX } },
  1839 + { "(bad)", { XX } },
  1840 + { "(bad)", { XX } },
  1841 + { "", { VM } }, /* See OP_VMX. */
  1842 + { "vmptrst", { Mq } },
  1843 + },
  1844 + /* GRP11_C6 */
  1845 + {
  1846 + { "movA", { Eb, Ib } },
  1847 + { "(bad)", { XX } },
  1848 + { "(bad)", { XX } },
  1849 + { "(bad)", { XX } },
  1850 + { "(bad)", { XX } },
  1851 + { "(bad)", { XX } },
  1852 + { "(bad)", { XX } },
  1853 + { "(bad)", { XX } },
  1854 + },
  1855 + /* GRP11_C7 */
  1856 + {
  1857 + { "movQ", { Ev, Iv } },
  1858 + { "(bad)", { XX } },
  1859 + { "(bad)", { XX } },
  1860 + { "(bad)", { XX } },
  1861 + { "(bad)", { XX } },
  1862 + { "(bad)", { XX } },
  1863 + { "(bad)", { XX } },
  1864 + { "(bad)", { XX } },
1455 1865 },
1456 1866 /* GRP12 */
1457 1867 {
1458   - { "(bad)", XX, XX, XX },
1459   - { "(bad)", XX, XX, XX },
1460   - { "psrlq", MS, Ib, XX },
1461   - { "psrldq", MS, Ib, XX },
1462   - { "(bad)", XX, XX, XX },
1463   - { "(bad)", XX, XX, XX },
1464   - { "psllq", MS, Ib, XX },
1465   - { "pslldq", MS, Ib, XX },
  1868 + { "(bad)", { XX } },
  1869 + { "(bad)", { XX } },
  1870 + { "psrlw", { MS, Ib } },
  1871 + { "(bad)", { XX } },
  1872 + { "psraw", { MS, Ib } },
  1873 + { "(bad)", { XX } },
  1874 + { "psllw", { MS, Ib } },
  1875 + { "(bad)", { XX } },
1466 1876 },
1467 1877 /* GRP13 */
1468 1878 {
1469   - { "fxsave", Ev, XX, XX },
1470   - { "fxrstor", Ev, XX, XX },
1471   - { "ldmxcsr", Ev, XX, XX },
1472   - { "stmxcsr", Ev, XX, XX },
1473   - { "(bad)", XX, XX, XX },
1474   - { "lfence", OP_0fae, 0, XX, XX },
1475   - { "mfence", OP_0fae, 0, XX, XX },
1476   - { "clflush", OP_0fae, 0, XX, XX },
  1879 + { "(bad)", { XX } },
  1880 + { "(bad)", { XX } },
  1881 + { "psrld", { MS, Ib } },
  1882 + { "(bad)", { XX } },
  1883 + { "psrad", { MS, Ib } },
  1884 + { "(bad)", { XX } },
  1885 + { "pslld", { MS, Ib } },
  1886 + { "(bad)", { XX } },
1477 1887 },
1478 1888 /* GRP14 */
1479 1889 {
1480   - { "prefetchnta", Ev, XX, XX },
1481   - { "prefetcht0", Ev, XX, XX },
1482   - { "prefetcht1", Ev, XX, XX },
1483   - { "prefetcht2", Ev, XX, XX },
1484   - { "(bad)", XX, XX, XX },
1485   - { "(bad)", XX, XX, XX },
1486   - { "(bad)", XX, XX, XX },
1487   - { "(bad)", XX, XX, XX },
  1890 + { "(bad)", { XX } },
  1891 + { "(bad)", { XX } },
  1892 + { "psrlq", { MS, Ib } },
  1893 + { "psrldq", { MS, Ib } },
  1894 + { "(bad)", { XX } },
  1895 + { "(bad)", { XX } },
  1896 + { "psllq", { MS, Ib } },
  1897 + { "pslldq", { MS, Ib } },
  1898 + },
  1899 + /* GRP15 */
  1900 + {
  1901 + { "fxsave", { Ev } },
  1902 + { "fxrstor", { Ev } },
  1903 + { "ldmxcsr", { Ev } },
  1904 + { "stmxcsr", { Ev } },
  1905 + { "(bad)", { XX } },
  1906 + { "lfence", { { OP_0fae, 0 } } },
  1907 + { "mfence", { { OP_0fae, 0 } } },
  1908 + { "clflush", { { OP_0fae, 0 } } },
  1909 + },
  1910 + /* GRP16 */
  1911 + {
  1912 + { "prefetchnta", { Ev } },
  1913 + { "prefetcht0", { Ev } },
  1914 + { "prefetcht1", { Ev } },
  1915 + { "prefetcht2", { Ev } },
  1916 + { "(bad)", { XX } },
  1917 + { "(bad)", { XX } },
  1918 + { "(bad)", { XX } },
  1919 + { "(bad)", { XX } },
1488 1920 },
1489 1921 /* GRPAMD */
1490 1922 {
1491   - { "prefetch", Eb, XX, XX },
1492   - { "prefetchw", Eb, XX, XX },
1493   - { "(bad)", XX, XX, XX },
1494   - { "(bad)", XX, XX, XX },
1495   - { "(bad)", XX, XX, XX },
1496   - { "(bad)", XX, XX, XX },
1497   - { "(bad)", XX, XX, XX },
1498   - { "(bad)", XX, XX, XX },
  1923 + { "prefetch", { Eb } },
  1924 + { "prefetchw", { Eb } },
  1925 + { "(bad)", { XX } },
  1926 + { "(bad)", { XX } },
  1927 + { "(bad)", { XX } },
  1928 + { "(bad)", { XX } },
  1929 + { "(bad)", { XX } },
  1930 + { "(bad)", { XX } },
1499 1931 },
1500 1932 /* GRPPADLCK1 */
1501 1933 {
1502   - { "xstore-rng", OP_0f07, 0, XX, XX },
1503   - { "xcrypt-ecb", OP_0f07, 0, XX, XX },
1504   - { "xcrypt-cbc", OP_0f07, 0, XX, XX },
1505   - { "xcrypt-ctr", OP_0f07, 0, XX, XX },
1506   - { "xcrypt-cfb", OP_0f07, 0, XX, XX },
1507   - { "xcrypt-ofb", OP_0f07, 0, XX, XX },
1508   - { "(bad)", OP_0f07, 0, XX, XX },
1509   - { "(bad)", OP_0f07, 0, XX, XX },
  1934 + { "xstore-rng", { { OP_0f07, 0 } } },
  1935 + { "xcrypt-ecb", { { OP_0f07, 0 } } },
  1936 + { "xcrypt-cbc", { { OP_0f07, 0 } } },
  1937 + { "xcrypt-ctr", { { OP_0f07, 0 } } },
  1938 + { "xcrypt-cfb", { { OP_0f07, 0 } } },
  1939 + { "xcrypt-ofb", { { OP_0f07, 0 } } },
  1940 + { "(bad)", { { OP_0f07, 0 } } },
  1941 + { "(bad)", { { OP_0f07, 0 } } },
1510 1942 },
1511 1943 /* GRPPADLCK2 */
1512 1944 {
1513   - { "montmul", OP_0f07, 0, XX, XX },
1514   - { "xsha1", OP_0f07, 0, XX, XX },
1515   - { "xsha256", OP_0f07, 0, XX, XX },
1516   - { "(bad)", OP_0f07, 0, XX, XX },
1517   - { "(bad)", OP_0f07, 0, XX, XX },
1518   - { "(bad)", OP_0f07, 0, XX, XX },
1519   - { "(bad)", OP_0f07, 0, XX, XX },
1520   - { "(bad)", OP_0f07, 0, XX, XX },
  1945 + { "montmul", { { OP_0f07, 0 } } },
  1946 + { "xsha1", { { OP_0f07, 0 } } },
  1947 + { "xsha256", { { OP_0f07, 0 } } },
  1948 + { "(bad)", { { OP_0f07, 0 } } },
  1949 + { "(bad)", { { OP_0f07, 0 } } },
  1950 + { "(bad)", { { OP_0f07, 0 } } },
  1951 + { "(bad)", { { OP_0f07, 0 } } },
  1952 + { "(bad)", { { OP_0f07, 0 } } },
1521 1953 }
1522 1954 };
1523 1955  
1524 1956 static const struct dis386 prefix_user_table[][4] = {
1525 1957 /* PREGRP0 */
1526 1958 {
1527   - { "addps", XM, EX, XX },
1528   - { "addss", XM, EX, XX },
1529   - { "addpd", XM, EX, XX },
1530   - { "addsd", XM, EX, XX },
  1959 + { "addps", { XM, EXx } },
  1960 + { "addss", { XM, EXd } },
  1961 + { "addpd", { XM, EXx } },
  1962 + { "addsd", { XM, EXq } },
1531 1963 },
1532 1964 /* PREGRP1 */
1533 1965 {
1534   - { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1535   - { "", XM, EX, OPSIMD },
1536   - { "", XM, EX, OPSIMD },
1537   - { "", XM, EX, OPSIMD },
  1966 + { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
  1967 + { "", { XM, EXx, OPSIMD } },
  1968 + { "", { XM, EXx, OPSIMD } },
  1969 + { "", { XM, EXx, OPSIMD } },
1538 1970 },
1539 1971 /* PREGRP2 */
1540 1972 {
1541   - { "cvtpi2ps", XM, EM, XX },
1542   - { "cvtsi2ssY", XM, Ev, XX },
1543   - { "cvtpi2pd", XM, EM, XX },
1544   - { "cvtsi2sdY", XM, Ev, XX },
  1973 + { "cvtpi2ps", { XM, EMC } },
  1974 + { "cvtsi2ssY", { XM, Ev } },
  1975 + { "cvtpi2pd", { XM, EMC } },
  1976 + { "cvtsi2sdY", { XM, Ev } },
1545 1977 },
1546 1978 /* PREGRP3 */
1547 1979 {
1548   - { "cvtps2pi", MX, EX, XX },
1549   - { "cvtss2siY", Gv, EX, XX },
1550   - { "cvtpd2pi", MX, EX, XX },
1551   - { "cvtsd2siY", Gv, EX, XX },
  1980 + { "cvtps2pi", { MXC, EXx } },
  1981 + { "cvtss2siY", { Gv, EXx } },
  1982 + { "cvtpd2pi", { MXC, EXx } },
  1983 + { "cvtsd2siY", { Gv, EXx } },
1552 1984 },
1553 1985 /* PREGRP4 */
1554 1986 {
1555   - { "cvttps2pi", MX, EX, XX },
1556   - { "cvttss2siY", Gv, EX, XX },
1557   - { "cvttpd2pi", MX, EX, XX },
1558   - { "cvttsd2siY", Gv, EX, XX },
  1987 + { "cvttps2pi", { MXC, EXx } },
  1988 + { "cvttss2siY", { Gv, EXx } },
  1989 + { "cvttpd2pi", { MXC, EXx } },
  1990 + { "cvttsd2siY", { Gv, EXx } },
1559 1991 },
1560 1992 /* PREGRP5 */
1561 1993 {
1562   - { "divps", XM, EX, XX },
1563   - { "divss", XM, EX, XX },
1564   - { "divpd", XM, EX, XX },
1565   - { "divsd", XM, EX, XX },
  1994 + { "divps", { XM, EXx } },
  1995 + { "divss", { XM, EXx } },
  1996 + { "divpd", { XM, EXx } },
  1997 + { "divsd", { XM, EXx } },
1566 1998 },
1567 1999 /* PREGRP6 */
1568 2000 {
1569   - { "maxps", XM, EX, XX },
1570   - { "maxss", XM, EX, XX },
1571   - { "maxpd", XM, EX, XX },
1572   - { "maxsd", XM, EX, XX },
  2001 + { "maxps", { XM, EXx } },
  2002 + { "maxss", { XM, EXx } },
  2003 + { "maxpd", { XM, EXx } },
  2004 + { "maxsd", { XM, EXx } },
1573 2005 },
1574 2006 /* PREGRP7 */
1575 2007 {
1576   - { "minps", XM, EX, XX },
1577   - { "minss", XM, EX, XX },
1578   - { "minpd", XM, EX, XX },
1579   - { "minsd", XM, EX, XX },
  2008 + { "minps", { XM, EXx } },
  2009 + { "minss", { XM, EXx } },
  2010 + { "minpd", { XM, EXx } },
  2011 + { "minsd", { XM, EXx } },
1580 2012 },
1581 2013 /* PREGRP8 */
1582 2014 {
1583   - { "movups", XM, EX, XX },
1584   - { "movss", XM, EX, XX },
1585   - { "movupd", XM, EX, XX },
1586   - { "movsd", XM, EX, XX },
  2015 + { "movups", { XM, EXx } },
  2016 + { "movss", { XM, EXx } },
  2017 + { "movupd", { XM, EXx } },
  2018 + { "movsd", { XM, EXx } },
1587 2019 },
1588 2020 /* PREGRP9 */
1589 2021 {
1590   - { "movups", EX, XM, XX },
1591   - { "movss", EX, XM, XX },
1592   - { "movupd", EX, XM, XX },
1593   - { "movsd", EX, XM, XX },
  2022 + { "movups", { EXx, XM } },
  2023 + { "movss", { EXx, XM } },
  2024 + { "movupd", { EXx, XM } },
  2025 + { "movsd", { EXx, XM } },
1594 2026 },
1595 2027 /* PREGRP10 */
1596 2028 {
1597   - { "mulps", XM, EX, XX },
1598   - { "mulss", XM, EX, XX },
1599   - { "mulpd", XM, EX, XX },
1600   - { "mulsd", XM, EX, XX },
  2029 + { "mulps", { XM, EXx } },
  2030 + { "mulss", { XM, EXx } },
  2031 + { "mulpd", { XM, EXx } },
  2032 + { "mulsd", { XM, EXx } },
1601 2033 },
1602 2034 /* PREGRP11 */
1603 2035 {
1604   - { "rcpps", XM, EX, XX },
1605   - { "rcpss", XM, EX, XX },
1606   - { "(bad)", XM, EX, XX },
1607   - { "(bad)", XM, EX, XX },
  2036 + { "rcpps", { XM, EXx } },
  2037 + { "rcpss", { XM, EXx } },
  2038 + { "(bad)", { XM, EXx } },
  2039 + { "(bad)", { XM, EXx } },
1608 2040 },
1609 2041 /* PREGRP12 */
1610 2042 {
1611   - { "rsqrtps", XM, EX, XX },
1612   - { "rsqrtss", XM, EX, XX },
1613   - { "(bad)", XM, EX, XX },
1614   - { "(bad)", XM, EX, XX },
  2043 + { "rsqrtps",{ XM, EXx } },
  2044 + { "rsqrtss",{ XM, EXx } },
  2045 + { "(bad)", { XM, EXx } },
  2046 + { "(bad)", { XM, EXx } },
1615 2047 },
1616 2048 /* PREGRP13 */
1617 2049 {
1618   - { "sqrtps", XM, EX, XX },
1619   - { "sqrtss", XM, EX, XX },
1620   - { "sqrtpd", XM, EX, XX },
1621   - { "sqrtsd", XM, EX, XX },
  2050 + { "sqrtps", { XM, EXx } },
  2051 + { "sqrtss", { XM, EXx } },
  2052 + { "sqrtpd", { XM, EXx } },
  2053 + { "sqrtsd", { XM, EXx } },
1622 2054 },
1623 2055 /* PREGRP14 */
1624 2056 {
1625   - { "subps", XM, EX, XX },
1626   - { "subss", XM, EX, XX },
1627   - { "subpd", XM, EX, XX },
1628   - { "subsd", XM, EX, XX },
  2057 + { "subps", { XM, EXx } },
  2058 + { "subss", { XM, EXx } },
  2059 + { "subpd", { XM, EXx } },
  2060 + { "subsd", { XM, EXx } },
1629 2061 },
1630 2062 /* PREGRP15 */
1631 2063 {
1632   - { "(bad)", XM, EX, XX },
1633   - { "cvtdq2pd", XM, EX, XX },
1634   - { "cvttpd2dq", XM, EX, XX },
1635   - { "cvtpd2dq", XM, EX, XX },
  2064 + { "(bad)", { XM, EXx } },
  2065 + { "cvtdq2pd", { XM, EXq } },
  2066 + { "cvttpd2dq", { XM, EXx } },
  2067 + { "cvtpd2dq", { XM, EXx } },
1636 2068 },
1637 2069 /* PREGRP16 */
1638 2070 {
1639   - { "cvtdq2ps", XM, EX, XX },
1640   - { "cvttps2dq",XM, EX, XX },
1641   - { "cvtps2dq",XM, EX, XX },
1642   - { "(bad)", XM, EX, XX },
  2071 + { "cvtdq2ps", { XM, EXx } },
  2072 + { "cvttps2dq", { XM, EXx } },
  2073 + { "cvtps2dq", { XM, EXx } },
  2074 + { "(bad)", { XM, EXx } },
1643 2075 },
1644 2076 /* PREGRP17 */
1645 2077 {
1646   - { "cvtps2pd", XM, EX, XX },
1647   - { "cvtss2sd", XM, EX, XX },
1648   - { "cvtpd2ps", XM, EX, XX },
1649   - { "cvtsd2ss", XM, EX, XX },
  2078 + { "cvtps2pd", { XM, EXq } },
  2079 + { "cvtss2sd", { XM, EXx } },
  2080 + { "cvtpd2ps", { XM, EXx } },
  2081 + { "cvtsd2ss", { XM, EXx } },
1650 2082 },
1651 2083 /* PREGRP18 */
1652 2084 {
1653   - { "maskmovq", MX, MS, XX },
1654   - { "(bad)", XM, EX, XX },
1655   - { "maskmovdqu", XM, EX, XX },
1656   - { "(bad)", XM, EX, XX },
  2085 + { "maskmovq", { MX, MS } },
  2086 + { "(bad)", { XM, EXx } },
  2087 + { "maskmovdqu", { XM, XS } },
  2088 + { "(bad)", { XM, EXx } },
1657 2089 },
1658 2090 /* PREGRP19 */
1659 2091 {
1660   - { "movq", MX, EM, XX },
1661   - { "movdqu", XM, EX, XX },
1662   - { "movdqa", XM, EX, XX },
1663   - { "(bad)", XM, EX, XX },
  2092 + { "movq", { MX, EM } },
  2093 + { "movdqu", { XM, EXx } },
  2094 + { "movdqa", { XM, EXx } },
  2095 + { "(bad)", { XM, EXx } },
1664 2096 },
1665 2097 /* PREGRP20 */
1666 2098 {
1667   - { "movq", EM, MX, XX },
1668   - { "movdqu", EX, XM, XX },
1669   - { "movdqa", EX, XM, XX },
1670   - { "(bad)", EX, XM, XX },
  2099 + { "movq", { EM, MX } },
  2100 + { "movdqu", { EXx, XM } },
  2101 + { "movdqa", { EXx, XM } },
  2102 + { "(bad)", { EXx, XM } },
1671 2103 },
1672 2104 /* PREGRP21 */
1673 2105 {
1674   - { "(bad)", EX, XM, XX },
1675   - { "movq2dq", XM, MS, XX },
1676   - { "movq", EX, XM, XX },
1677   - { "movdq2q", MX, XS, XX },
  2106 + { "(bad)", { EXx, XM } },
  2107 + { "movq2dq",{ XM, MS } },
  2108 + { "movq", { EXx, XM } },
  2109 + { "movdq2q",{ MX, XS } },
1678 2110 },
1679 2111 /* PREGRP22 */
1680 2112 {
1681   - { "pshufw", MX, EM, Ib },
1682   - { "pshufhw", XM, EX, Ib },
1683   - { "pshufd", XM, EX, Ib },
1684   - { "pshuflw", XM, EX, Ib },
  2113 + { "pshufw", { MX, EM, Ib } },
  2114 + { "pshufhw",{ XM, EXx, Ib } },
  2115 + { "pshufd", { XM, EXx, Ib } },
  2116 + { "pshuflw",{ XM, EXx, Ib } },
1685 2117 },
1686 2118 /* PREGRP23 */
1687 2119 {
1688   - { "movd", Edq, MX, XX },
1689   - { "movq", XM, EX, XX },
1690   - { "movd", Edq, XM, XX },
1691   - { "(bad)", Ed, XM, XX },
  2120 + { "movd", { Edq, MX } },
  2121 + { "movq", { XM, EXx } },
  2122 + { "movd", { Edq, XM } },
  2123 + { "(bad)", { Ed, XM } },
1692 2124 },
1693 2125 /* PREGRP24 */
1694 2126 {
1695   - { "(bad)", MX, EX, XX },
1696   - { "(bad)", XM, EX, XX },
1697   - { "punpckhqdq", XM, EX, XX },
1698   - { "(bad)", XM, EX, XX },
  2127 + { "(bad)", { MX, EXx } },
  2128 + { "(bad)", { XM, EXx } },
  2129 + { "punpckhqdq", { XM, EXx } },
  2130 + { "(bad)", { XM, EXx } },
1699 2131 },
1700 2132 /* PREGRP25 */
1701 2133 {
1702   - { "movntq", EM, MX, XX },
1703   - { "(bad)", EM, XM, XX },
1704   - { "movntdq", EM, XM, XX },
1705   - { "(bad)", EM, XM, XX },
  2134 + { "movntq", { EM, MX } },
  2135 + { "(bad)", { EM, XM } },
  2136 + { "movntdq",{ EM, XM } },
  2137 + { "(bad)", { EM, XM } },
1706 2138 },
1707 2139 /* PREGRP26 */
1708 2140 {
1709   - { "(bad)", MX, EX, XX },
1710   - { "(bad)", XM, EX, XX },
1711   - { "punpcklqdq", XM, EX, XX },
1712   - { "(bad)", XM, EX, XX },
  2141 + { "(bad)", { MX, EXx } },
  2142 + { "(bad)", { XM, EXx } },
  2143 + { "punpcklqdq", { XM, EXx } },
  2144 + { "(bad)", { XM, EXx } },
1713 2145 },
1714 2146 /* PREGRP27 */
1715 2147 {
1716   - { "(bad)", MX, EX, XX },
1717   - { "(bad)", XM, EX, XX },
1718   - { "addsubpd", XM, EX, XX },
1719   - { "addsubps", XM, EX, XX },
  2148 + { "(bad)", { MX, EXx } },
  2149 + { "(bad)", { XM, EXx } },
  2150 + { "addsubpd", { XM, EXx } },
  2151 + { "addsubps", { XM, EXx } },
1720 2152 },
1721 2153 /* PREGRP28 */
1722 2154 {
1723   - { "(bad)", MX, EX, XX },
1724   - { "(bad)", XM, EX, XX },
1725   - { "haddpd", XM, EX, XX },
1726   - { "haddps", XM, EX, XX },
  2155 + { "(bad)", { MX, EXx } },
  2156 + { "(bad)", { XM, EXx } },
  2157 + { "haddpd", { XM, EXx } },
  2158 + { "haddps", { XM, EXx } },
1727 2159 },
1728 2160 /* PREGRP29 */
1729 2161 {
1730   - { "(bad)", MX, EX, XX },
1731   - { "(bad)", XM, EX, XX },
1732   - { "hsubpd", XM, EX, XX },
1733   - { "hsubps", XM, EX, XX },
  2162 + { "(bad)", { MX, EXx } },
  2163 + { "(bad)", { XM, EXx } },
  2164 + { "hsubpd", { XM, EXx } },
  2165 + { "hsubps", { XM, EXx } },
1734 2166 },
1735 2167 /* PREGRP30 */
1736 2168 {
1737   - { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1738   - { "movsldup", XM, EX, XX },
1739   - { "movlpd", XM, EX, XX },
1740   - { "movddup", XM, EX, XX },
  2169 + { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
  2170 + { "movsldup", { XM, EXx } },
  2171 + { "movlpd", { XM, EXq } },
  2172 + { "movddup", { XM, EXq } },
1741 2173 },
1742 2174 /* PREGRP31 */
1743 2175 {
1744   - { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1745   - { "movshdup", XM, EX, XX },
1746   - { "movhpd", XM, EX, XX },
1747   - { "(bad)", XM, EX, XX },
  2176 + { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
  2177 + { "movshdup", { XM, EXx } },
  2178 + { "movhpd", { XM, EXq } },
  2179 + { "(bad)", { XM, EXq } },
1748 2180 },
1749 2181 /* PREGRP32 */
1750 2182 {
1751   - { "(bad)", XM, EX, XX },
1752   - { "(bad)", XM, EX, XX },
1753   - { "(bad)", XM, EX, XX },
1754   - { "lddqu", XM, M, XX },
  2183 + { "(bad)", { XM, EXx } },
  2184 + { "(bad)", { XM, EXx } },
  2185 + { "(bad)", { XM, EXx } },
  2186 + { "lddqu", { XM, M } },
  2187 + },
  2188 + /* PREGRP33 */
  2189 + {
  2190 + {"movntps", { Ev, XM } },
  2191 + {"movntss", { Ev, XM } },
  2192 + {"movntpd", { Ev, XM } },
  2193 + {"movntsd", { Ev, XM } },
  2194 + },
  2195 +
  2196 + /* PREGRP34 */
  2197 + {
  2198 + {"vmread", { Em, Gm } },
  2199 + {"(bad)", { XX } },
  2200 + {"extrq", { XS, Ib, Ib } },
  2201 + {"insertq", { XM, XS, Ib, Ib } },
  2202 + },
  2203 +
  2204 + /* PREGRP35 */
  2205 + {
  2206 + {"vmwrite", { Gm, Em } },
  2207 + {"(bad)", { XX } },
  2208 + {"extrq", { XM, XS } },
  2209 + {"insertq", { XM, XS } },
  2210 + },
  2211 +
  2212 + /* PREGRP36 */
  2213 + {
  2214 + { "bsrS", { Gv, Ev } },
  2215 + { "lzcntS", { Gv, Ev } },
  2216 + { "bsrS", { Gv, Ev } },
  2217 + { "(bad)", { XX } },
  2218 + },
  2219 +
  2220 + /* PREGRP37 */
  2221 + {
  2222 + { "(bad)", { XX } },
  2223 + { "popcntS", { Gv, Ev } },
  2224 + { "(bad)", { XX } },
  2225 + { "(bad)", { XX } },
  2226 + },
  2227 +
  2228 + /* PREGRP38 */
  2229 + {
  2230 + { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
  2231 + { "pause", { XX } },
  2232 + { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
  2233 + { "(bad)", { XX } },
  2234 + },
  2235 +
  2236 + /* PREGRP39 */
  2237 + {
  2238 + { "(bad)", { XX } },
  2239 + { "(bad)", { XX } },
  2240 + { "pblendvb", {XM, EXx, XMM0 } },
  2241 + { "(bad)", { XX } },
  2242 + },
  2243 +
  2244 + /* PREGRP40 */
  2245 + {
  2246 + { "(bad)", { XX } },
  2247 + { "(bad)", { XX } },
  2248 + { "blendvps", {XM, EXx, XMM0 } },
  2249 + { "(bad)", { XX } },
  2250 + },
  2251 +
  2252 + /* PREGRP41 */
  2253 + {
  2254 + { "(bad)", { XX } },
  2255 + { "(bad)", { XX } },
  2256 + { "blendvpd", { XM, EXx, XMM0 } },
  2257 + { "(bad)", { XX } },
  2258 + },
  2259 +
  2260 + /* PREGRP42 */
  2261 + {
  2262 + { "(bad)", { XX } },
  2263 + { "(bad)", { XX } },
  2264 + { "ptest", { XM, EXx } },
  2265 + { "(bad)", { XX } },
  2266 + },
  2267 +
  2268 + /* PREGRP43 */
  2269 + {
  2270 + { "(bad)", { XX } },
  2271 + { "(bad)", { XX } },
  2272 + { "pmovsxbw", { XM, EXx } },
  2273 + { "(bad)", { XX } },
  2274 + },
  2275 +
  2276 + /* PREGRP44 */
  2277 + {
  2278 + { "(bad)", { XX } },
  2279 + { "(bad)", { XX } },
  2280 + { "pmovsxbd", { XM, EXx } },
  2281 + { "(bad)", { XX } },
  2282 + },
  2283 +
  2284 + /* PREGRP45 */
  2285 + {
  2286 + { "(bad)", { XX } },
  2287 + { "(bad)", { XX } },
  2288 + { "pmovsxbq", { XM, EXx } },
  2289 + { "(bad)", { XX } },
  2290 + },
  2291 +
  2292 + /* PREGRP46 */
  2293 + {
  2294 + { "(bad)", { XX } },
  2295 + { "(bad)", { XX } },
  2296 + { "pmovsxwd", { XM, EXx } },
  2297 + { "(bad)", { XX } },
  2298 + },
  2299 +
  2300 + /* PREGRP47 */
  2301 + {
  2302 + { "(bad)", { XX } },
  2303 + { "(bad)", { XX } },
  2304 + { "pmovsxwq", { XM, EXx } },
  2305 + { "(bad)", { XX } },
  2306 + },
  2307 +
  2308 + /* PREGRP48 */
  2309 + {
  2310 + { "(bad)", { XX } },
  2311 + { "(bad)", { XX } },
  2312 + { "pmovsxdq", { XM, EXx } },
  2313 + { "(bad)", { XX } },
  2314 + },
  2315 +
  2316 + /* PREGRP49 */
  2317 + {
  2318 + { "(bad)", { XX } },
  2319 + { "(bad)", { XX } },
  2320 + { "pmuldq", { XM, EXx } },
  2321 + { "(bad)", { XX } },
  2322 + },
  2323 +
  2324 + /* PREGRP50 */
  2325 + {
  2326 + { "(bad)", { XX } },
  2327 + { "(bad)", { XX } },
  2328 + { "pcmpeqq", { XM, EXx } },
  2329 + { "(bad)", { XX } },
  2330 + },
  2331 +
  2332 + /* PREGRP51 */
  2333 + {
  2334 + { "(bad)", { XX } },
  2335 + { "(bad)", { XX } },
  2336 + { "movntdqa", { XM, EM } },
  2337 + { "(bad)", { XX } },
  2338 + },
  2339 +
  2340 + /* PREGRP52 */
  2341 + {
  2342 + { "(bad)", { XX } },
  2343 + { "(bad)", { XX } },
  2344 + { "packusdw", { XM, EXx } },
  2345 + { "(bad)", { XX } },
  2346 + },
  2347 +
  2348 + /* PREGRP53 */
  2349 + {
  2350 + { "(bad)", { XX } },
  2351 + { "(bad)", { XX } },
  2352 + { "pmovzxbw", { XM, EXx } },
  2353 + { "(bad)", { XX } },
  2354 + },
  2355 +
  2356 + /* PREGRP54 */
  2357 + {
  2358 + { "(bad)", { XX } },
  2359 + { "(bad)", { XX } },
  2360 + { "pmovzxbd", { XM, EXx } },
  2361 + { "(bad)", { XX } },
  2362 + },
  2363 +
  2364 + /* PREGRP55 */
  2365 + {
  2366 + { "(bad)", { XX } },
  2367 + { "(bad)", { XX } },
  2368 + { "pmovzxbq", { XM, EXx } },
  2369 + { "(bad)", { XX } },
  2370 + },
  2371 +
  2372 + /* PREGRP56 */
  2373 + {
  2374 + { "(bad)", { XX } },
  2375 + { "(bad)", { XX } },
  2376 + { "pmovzxwd", { XM, EXx } },
  2377 + { "(bad)", { XX } },
  2378 + },
  2379 +
  2380 + /* PREGRP57 */
  2381 + {
  2382 + { "(bad)", { XX } },
  2383 + { "(bad)", { XX } },
  2384 + { "pmovzxwq", { XM, EXx } },
  2385 + { "(bad)", { XX } },
  2386 + },
  2387 +
  2388 + /* PREGRP58 */
  2389 + {
  2390 + { "(bad)", { XX } },
  2391 + { "(bad)", { XX } },
  2392 + { "pmovzxdq", { XM, EXx } },
  2393 + { "(bad)", { XX } },
  2394 + },
  2395 +
  2396 + /* PREGRP59 */
  2397 + {
  2398 + { "(bad)", { XX } },
  2399 + { "(bad)", { XX } },
  2400 + { "pminsb", { XM, EXx } },
  2401 + { "(bad)", { XX } },
  2402 + },
  2403 +
  2404 + /* PREGRP60 */
  2405 + {
  2406 + { "(bad)", { XX } },
  2407 + { "(bad)", { XX } },
  2408 + { "pminsd", { XM, EXx } },
  2409 + { "(bad)", { XX } },
  2410 + },
  2411 +
  2412 + /* PREGRP61 */
  2413 + {
  2414 + { "(bad)", { XX } },
  2415 + { "(bad)", { XX } },
  2416 + { "pminuw", { XM, EXx } },
  2417 + { "(bad)", { XX } },
  2418 + },
  2419 +
  2420 + /* PREGRP62 */
  2421 + {
  2422 + { "(bad)", { XX } },
  2423 + { "(bad)", { XX } },
  2424 + { "pminud", { XM, EXx } },
  2425 + { "(bad)", { XX } },
  2426 + },
  2427 +
  2428 + /* PREGRP63 */
  2429 + {
  2430 + { "(bad)", { XX } },
  2431 + { "(bad)", { XX } },
  2432 + { "pmaxsb", { XM, EXx } },
  2433 + { "(bad)", { XX } },
  2434 + },
  2435 +
  2436 + /* PREGRP64 */
  2437 + {
  2438 + { "(bad)", { XX } },
  2439 + { "(bad)", { XX } },
  2440 + { "pmaxsd", { XM, EXx } },
  2441 + { "(bad)", { XX } },
  2442 + },
  2443 +
  2444 + /* PREGRP65 */
  2445 + {
  2446 + { "(bad)", { XX } },
  2447 + { "(bad)", { XX } },
  2448 + { "pmaxuw", { XM, EXx } },
  2449 + { "(bad)", { XX } },
  2450 + },
  2451 +
  2452 + /* PREGRP66 */
  2453 + {
  2454 + { "(bad)", { XX } },
  2455 + { "(bad)", { XX } },
  2456 + { "pmaxud", { XM, EXx } },
  2457 + { "(bad)", { XX } },
  2458 + },
  2459 +
  2460 + /* PREGRP67 */
  2461 + {
  2462 + { "(bad)", { XX } },
  2463 + { "(bad)", { XX } },
  2464 + { "pmulld", { XM, EXx } },
  2465 + { "(bad)", { XX } },
  2466 + },
  2467 +
  2468 + /* PREGRP68 */
  2469 + {
  2470 + { "(bad)", { XX } },
  2471 + { "(bad)", { XX } },
  2472 + { "phminposuw", { XM, EXx } },
  2473 + { "(bad)", { XX } },
  2474 + },
  2475 +
  2476 + /* PREGRP69 */
  2477 + {
  2478 + { "(bad)", { XX } },
  2479 + { "(bad)", { XX } },
  2480 + { "roundps", { XM, EXx, Ib } },
  2481 + { "(bad)", { XX } },
  2482 + },
  2483 +
  2484 + /* PREGRP70 */
  2485 + {
  2486 + { "(bad)", { XX } },
  2487 + { "(bad)", { XX } },
  2488 + { "roundpd", { XM, EXx, Ib } },
  2489 + { "(bad)", { XX } },
  2490 + },
  2491 +
  2492 + /* PREGRP71 */
  2493 + {
  2494 + { "(bad)", { XX } },
  2495 + { "(bad)", { XX } },
  2496 + { "roundss", { XM, EXx, Ib } },
  2497 + { "(bad)", { XX } },
  2498 + },
  2499 +
  2500 + /* PREGRP72 */
  2501 + {
  2502 + { "(bad)", { XX } },
  2503 + { "(bad)", { XX } },
  2504 + { "roundsd", { XM, EXx, Ib } },
  2505 + { "(bad)", { XX } },
  2506 + },
  2507 +
  2508 + /* PREGRP73 */
  2509 + {
  2510 + { "(bad)", { XX } },
  2511 + { "(bad)", { XX } },
  2512 + { "blendps", { XM, EXx, Ib } },
  2513 + { "(bad)", { XX } },
  2514 + },
  2515 +
  2516 + /* PREGRP74 */
  2517 + {
  2518 + { "(bad)", { XX } },
  2519 + { "(bad)", { XX } },
  2520 + { "blendpd", { XM, EXx, Ib } },
  2521 + { "(bad)", { XX } },
  2522 + },
  2523 +
  2524 + /* PREGRP75 */
  2525 + {
  2526 + { "(bad)", { XX } },
  2527 + { "(bad)", { XX } },
  2528 + { "pblendw", { XM, EXx, Ib } },
  2529 + { "(bad)", { XX } },
  2530 + },
  2531 +
  2532 + /* PREGRP76 */
  2533 + {
  2534 + { "(bad)", { XX } },
  2535 + { "(bad)", { XX } },
  2536 + { "pextrb", { Edqb, XM, Ib } },
  2537 + { "(bad)", { XX } },
  2538 + },
  2539 +
  2540 + /* PREGRP77 */
  2541 + {
  2542 + { "(bad)", { XX } },
  2543 + { "(bad)", { XX } },
  2544 + { "pextrw", { Edqw, XM, Ib } },
  2545 + { "(bad)", { XX } },
  2546 + },
  2547 +
  2548 + /* PREGRP78 */
  2549 + {
  2550 + { "(bad)", { XX } },
  2551 + { "(bad)", { XX } },
  2552 + { "pextrK", { Edq, XM, Ib } },
  2553 + { "(bad)", { XX } },
  2554 + },
  2555 +
  2556 + /* PREGRP79 */
  2557 + {
  2558 + { "(bad)", { XX } },
  2559 + { "(bad)", { XX } },
  2560 + { "extractps", { Edqd, XM, Ib } },
  2561 + { "(bad)", { XX } },
  2562 + },
  2563 +
  2564 + /* PREGRP80 */
  2565 + {
  2566 + { "(bad)", { XX } },
  2567 + { "(bad)", { XX } },
  2568 + { "pinsrb", { XM, Edqb, Ib } },
  2569 + { "(bad)", { XX } },
  2570 + },
  2571 +
  2572 + /* PREGRP81 */
  2573 + {
  2574 + { "(bad)", { XX } },
  2575 + { "(bad)", { XX } },
  2576 + { "insertps", { XM, EXx, Ib } },
  2577 + { "(bad)", { XX } },
  2578 + },
  2579 +
  2580 + /* PREGRP82 */
  2581 + {
  2582 + { "(bad)", { XX } },
  2583 + { "(bad)", { XX } },
  2584 + { "pinsrK", { XM, Edq, Ib } },
  2585 + { "(bad)", { XX } },
  2586 + },
  2587 +
  2588 + /* PREGRP83 */
  2589 + {
  2590 + { "(bad)", { XX } },
  2591 + { "(bad)", { XX } },
  2592 + { "dpps", { XM, EXx, Ib } },
  2593 + { "(bad)", { XX } },
  2594 + },
  2595 +
  2596 + /* PREGRP84 */
  2597 + {
  2598 + { "(bad)", { XX } },
  2599 + { "(bad)", { XX } },
  2600 + { "dppd", { XM, EXx, Ib } },
  2601 + { "(bad)", { XX } },
  2602 + },
  2603 +
  2604 + /* PREGRP85 */
  2605 + {
  2606 + { "(bad)", { XX } },
  2607 + { "(bad)", { XX } },
  2608 + { "mpsadbw", { XM, EXx, Ib } },
  2609 + { "(bad)", { XX } },
  2610 + },
  2611 +
  2612 + /* PREGRP86 */
  2613 + {
  2614 + { "(bad)", { XX } },
  2615 + { "(bad)", { XX } },
  2616 + { "pcmpgtq", { XM, EXx } },
  2617 + { "(bad)", { XX } },
  2618 + },
  2619 +
  2620 + /* PREGRP87 */
  2621 + {
  2622 + { "(bad)", { XX } },
  2623 + { "(bad)", { XX } },
  2624 + { "(bad)", { XX } },
  2625 + { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
  2626 + },
  2627 +
  2628 + /* PREGRP88 */
  2629 + {
  2630 + { "(bad)", { XX } },
  2631 + { "(bad)", { XX } },
  2632 + { "(bad)", { XX } },
  2633 + { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
  2634 + },
  2635 +
  2636 + /* PREGRP89 */
  2637 + {
  2638 + { "(bad)", { XX } },
  2639 + { "(bad)", { XX } },
  2640 + { "pcmpestrm", { XM, EXx, Ib } },
  2641 + { "(bad)", { XX } },
  2642 + },
  2643 +
  2644 + /* PREGRP90 */
  2645 + {
  2646 + { "(bad)", { XX } },
  2647 + { "(bad)", { XX } },
  2648 + { "pcmpestri", { XM, EXx, Ib } },
  2649 + { "(bad)", { XX } },
  2650 + },
  2651 +
  2652 + /* PREGRP91 */
  2653 + {
  2654 + { "(bad)", { XX } },
  2655 + { "(bad)", { XX } },
  2656 + { "pcmpistrm", { XM, EXx, Ib } },
  2657 + { "(bad)", { XX } },
  2658 + },
  2659 +
  2660 + /* PREGRP92 */
  2661 + {
  2662 + { "(bad)", { XX } },
  2663 + { "(bad)", { XX } },
  2664 + { "pcmpistri", { XM, EXx, Ib } },
  2665 + { "(bad)", { XX } },
  2666 + },
  2667 +
  2668 + /* PREGRP93 */
  2669 + {
  2670 + { "ucomiss",{ XM, EXd } },
  2671 + { "(bad)", { XX } },
  2672 + { "ucomisd",{ XM, EXq } },
  2673 + { "(bad)", { XX } },
  2674 + },
  2675 +
  2676 + /* PREGRP94 */
  2677 + {
  2678 + { "comiss", { XM, EXd } },
  2679 + { "(bad)", { XX } },
  2680 + { "comisd", { XM, EXq } },
  2681 + { "(bad)", { XX } },
  2682 + },
  2683 +
  2684 + /* PREGRP95 */
  2685 + {
  2686 + { "punpcklbw",{ MX, EMd } },
  2687 + { "(bad)", { XX } },
  2688 + { "punpcklbw",{ MX, EMq } },
  2689 + { "(bad)", { XX } },
  2690 + },
  2691 +
  2692 + /* PREGRP96 */
  2693 + {
  2694 + { "punpcklwd",{ MX, EMd } },
  2695 + { "(bad)", { XX } },
  2696 + { "punpcklwd",{ MX, EMq } },
  2697 + { "(bad)", { XX } },
  2698 + },
  2699 +
  2700 + /* PREGRP97 */
  2701 + {
  2702 + { "punpckldq",{ MX, EMd } },
  2703 + { "(bad)", { XX } },
  2704 + { "punpckldq",{ MX, EMq } },
  2705 + { "(bad)", { XX } },
1755 2706 },
1756 2707 };
1757 2708  
1758 2709 static const struct dis386 x86_64_table[][2] = {
1759 2710 {
1760   - { "arpl", Ew, Gw, XX },
1761   - { "movs{||lq|xd}", Gv, Ed, XX },
  2711 + { "pusha{P|}", { XX } },
  2712 + { "(bad)", { XX } },
  2713 + },
  2714 + {
  2715 + { "popa{P|}", { XX } },
  2716 + { "(bad)", { XX } },
  2717 + },
  2718 + {
  2719 + { "bound{S|}", { Gv, Ma } },
  2720 + { "(bad)", { XX } },
  2721 + },
  2722 + {
  2723 + { "arpl", { Ew, Gw } },
  2724 + { "movs{||lq|xd}", { Gv, Ed } },
1762 2725 },
1763 2726 };
1764 2727  
1765   -static const struct dis386 three_byte_table[][32] = {
  2728 +static const struct dis386 three_byte_table[][256] = {
1766 2729 /* THREE_BYTE_0 */
1767 2730 {
1768   - { "pshufb", MX, EM, XX },
1769   - { "phaddw", MX, EM, XX },
1770   - { "phaddd", MX, EM, XX },
1771   - { "phaddsw", MX, EM, XX },
1772   - { "pmaddubsw", MX, EM, XX },
1773   - { "phsubw", MX, EM, XX },
1774   - { "phsubd", MX, EM, XX },
1775   - { "phsubsw", MX, EM, XX },
1776   - { "psignb", MX, EM, XX },
1777   - { "psignw", MX, EM, XX },
1778   - { "psignd", MX, EM, XX },
1779   - { "pmulhrsw", MX, EM, XX },
1780   - { "(bad)", XX, XX, XX },
1781   - { "(bad)", XX, XX, XX },
1782   - { "(bad)", XX, XX, XX },
1783   - { "(bad)", XX, XX, XX },
1784   - { "(bad)", XX, XX, XX },
1785   - { "(bad)", XX, XX, XX },
1786   - { "(bad)", XX, XX, XX },
1787   - { "(bad)", XX, XX, XX },
1788   - { "(bad)", XX, XX, XX },
1789   - { "(bad)", XX, XX, XX },
1790   - { "(bad)", XX, XX, XX },
1791   - { "(bad)", XX, XX, XX },
1792   - { "(bad)", XX, XX, XX },
1793   - { "(bad)", XX, XX, XX },
1794   - { "(bad)", XX, XX, XX },
1795   - { "(bad)", XX, XX, XX },
1796   - { "pabsb", MX, EM, XX },
1797   - { "pabsw", MX, EM, XX },
1798   - { "pabsd", MX, EM, XX },
1799   - { "(bad)", XX, XX, XX }
  2731 + /* 00 */
  2732 + { "pshufb", { MX, EM } },
  2733 + { "phaddw", { MX, EM } },
  2734 + { "phaddd", { MX, EM } },
  2735 + { "phaddsw", { MX, EM } },
  2736 + { "pmaddubsw", { MX, EM } },
  2737 + { "phsubw", { MX, EM } },
  2738 + { "phsubd", { MX, EM } },
  2739 + { "phsubsw", { MX, EM } },
  2740 + /* 08 */
  2741 + { "psignb", { MX, EM } },
  2742 + { "psignw", { MX, EM } },
  2743 + { "psignd", { MX, EM } },
  2744 + { "pmulhrsw", { MX, EM } },
  2745 + { "(bad)", { XX } },
  2746 + { "(bad)", { XX } },
  2747 + { "(bad)", { XX } },
  2748 + { "(bad)", { XX } },
  2749 + /* 10 */
  2750 + { PREGRP39 },
  2751 + { "(bad)", { XX } },
  2752 + { "(bad)", { XX } },
  2753 + { "(bad)", { XX } },
  2754 + { PREGRP40 },
  2755 + { PREGRP41 },
  2756 + { "(bad)", { XX } },
  2757 + { PREGRP42 },
  2758 + /* 18 */
  2759 + { "(bad)", { XX } },
  2760 + { "(bad)", { XX } },
  2761 + { "(bad)", { XX } },
  2762 + { "(bad)", { XX } },
  2763 + { "pabsb", { MX, EM } },
  2764 + { "pabsw", { MX, EM } },
  2765 + { "pabsd", { MX, EM } },
  2766 + { "(bad)", { XX } },
  2767 + /* 20 */
  2768 + { PREGRP43 },
  2769 + { PREGRP44 },
  2770 + { PREGRP45 },
  2771 + { PREGRP46 },
  2772 + { PREGRP47 },
  2773 + { PREGRP48 },
  2774 + { "(bad)", { XX } },
  2775 + { "(bad)", { XX } },
  2776 + /* 28 */
  2777 + { PREGRP49 },
  2778 + { PREGRP50 },
  2779 + { PREGRP51 },
  2780 + { PREGRP52 },
  2781 + { "(bad)", { XX } },
  2782 + { "(bad)", { XX } },
  2783 + { "(bad)", { XX } },
  2784 + { "(bad)", { XX } },
  2785 + /* 30 */
  2786 + { PREGRP53 },
  2787 + { PREGRP54 },
  2788 + { PREGRP55 },
  2789 + { PREGRP56 },
  2790 + { PREGRP57 },
  2791 + { PREGRP58 },
  2792 + { "(bad)", { XX } },
  2793 + { PREGRP86 },
  2794 + /* 38 */
  2795 + { PREGRP59 },
  2796 + { PREGRP60 },
  2797 + { PREGRP61 },
  2798 + { PREGRP62 },
  2799 + { PREGRP63 },
  2800 + { PREGRP64 },
  2801 + { PREGRP65 },
  2802 + { PREGRP66 },
  2803 + /* 40 */
  2804 + { PREGRP67 },
  2805 + { PREGRP68 },
  2806 + { "(bad)", { XX } },
  2807 + { "(bad)", { XX } },
  2808 + { "(bad)", { XX } },
  2809 + { "(bad)", { XX } },
  2810 + { "(bad)", { XX } },
  2811 + { "(bad)", { XX } },
  2812 + /* 48 */
  2813 + { "(bad)", { XX } },
  2814 + { "(bad)", { XX } },
  2815 + { "(bad)", { XX } },
  2816 + { "(bad)", { XX } },
  2817 + { "(bad)", { XX } },
  2818 + { "(bad)", { XX } },
  2819 + { "(bad)", { XX } },
  2820 + { "(bad)", { XX } },
  2821 + /* 50 */
  2822 + { "(bad)", { XX } },
  2823 + { "(bad)", { XX } },
  2824 + { "(bad)", { XX } },
  2825 + { "(bad)", { XX } },
  2826 + { "(bad)", { XX } },
  2827 + { "(bad)", { XX } },
  2828 + { "(bad)", { XX } },
  2829 + { "(bad)", { XX } },
  2830 + /* 58 */
  2831 + { "(bad)", { XX } },
  2832 + { "(bad)", { XX } },
  2833 + { "(bad)", { XX } },
  2834 + { "(bad)", { XX } },
  2835 + { "(bad)", { XX } },
  2836 + { "(bad)", { XX } },
  2837 + { "(bad)", { XX } },
  2838 + { "(bad)", { XX } },
  2839 + /* 60 */
  2840 + { "(bad)", { XX } },
  2841 + { "(bad)", { XX } },
  2842 + { "(bad)", { XX } },
  2843 + { "(bad)", { XX } },
  2844 + { "(bad)", { XX } },
  2845 + { "(bad)", { XX } },
  2846 + { "(bad)", { XX } },
  2847 + { "(bad)", { XX } },
  2848 + /* 68 */
  2849 + { "(bad)", { XX } },
  2850 + { "(bad)", { XX } },
  2851 + { "(bad)", { XX } },
  2852 + { "(bad)", { XX } },
  2853 + { "(bad)", { XX } },
  2854 + { "(bad)", { XX } },
  2855 + { "(bad)", { XX } },
  2856 + { "(bad)", { XX } },
  2857 + /* 70 */
  2858 + { "(bad)", { XX } },
  2859 + { "(bad)", { XX } },
  2860 + { "(bad)", { XX } },
  2861 + { "(bad)", { XX } },
  2862 + { "(bad)", { XX } },
  2863 + { "(bad)", { XX } },
  2864 + { "(bad)", { XX } },
  2865 + { "(bad)", { XX } },
  2866 + /* 78 */
  2867 + { "(bad)", { XX } },
  2868 + { "(bad)", { XX } },
  2869 + { "(bad)", { XX } },
  2870 + { "(bad)", { XX } },
  2871 + { "(bad)", { XX } },
  2872 + { "(bad)", { XX } },
  2873 + { "(bad)", { XX } },
  2874 + { "(bad)", { XX } },
  2875 + /* 80 */
  2876 + { "(bad)", { XX } },
  2877 + { "(bad)", { XX } },
  2878 + { "(bad)", { XX } },
  2879 + { "(bad)", { XX } },
  2880 + { "(bad)", { XX } },
  2881 + { "(bad)", { XX } },
  2882 + { "(bad)", { XX } },
  2883 + { "(bad)", { XX } },
  2884 + /* 88 */
  2885 + { "(bad)", { XX } },
  2886 + { "(bad)", { XX } },
  2887 + { "(bad)", { XX } },
  2888 + { "(bad)", { XX } },
  2889 + { "(bad)", { XX } },
  2890 + { "(bad)", { XX } },
  2891 + { "(bad)", { XX } },
  2892 + { "(bad)", { XX } },
  2893 + /* 90 */
  2894 + { "(bad)", { XX } },
  2895 + { "(bad)", { XX } },
  2896 + { "(bad)", { XX } },
  2897 + { "(bad)", { XX } },
  2898 + { "(bad)", { XX } },
  2899 + { "(bad)", { XX } },
  2900 + { "(bad)", { XX } },
  2901 + { "(bad)", { XX } },
  2902 + /* 98 */
  2903 + { "(bad)", { XX } },
  2904 + { "(bad)", { XX } },
  2905 + { "(bad)", { XX } },
  2906 + { "(bad)", { XX } },
  2907 + { "(bad)", { XX } },
  2908 + { "(bad)", { XX } },
  2909 + { "(bad)", { XX } },
  2910 + { "(bad)", { XX } },
  2911 + /* a0 */
  2912 + { "(bad)", { XX } },
  2913 + { "(bad)", { XX } },
  2914 + { "(bad)", { XX } },
  2915 + { "(bad)", { XX } },
  2916 + { "(bad)", { XX } },
  2917 + { "(bad)", { XX } },
  2918 + { "(bad)", { XX } },
  2919 + { "(bad)", { XX } },
  2920 + /* a8 */
  2921 + { "(bad)", { XX } },
  2922 + { "(bad)", { XX } },
  2923 + { "(bad)", { XX } },
  2924 + { "(bad)", { XX } },
  2925 + { "(bad)", { XX } },
  2926 + { "(bad)", { XX } },
  2927 + { "(bad)", { XX } },
  2928 + { "(bad)", { XX } },
  2929 + /* b0 */
  2930 + { "(bad)", { XX } },
  2931 + { "(bad)", { XX } },
  2932 + { "(bad)", { XX } },
  2933 + { "(bad)", { XX } },
  2934 + { "(bad)", { XX } },
  2935 + { "(bad)", { XX } },
  2936 + { "(bad)", { XX } },
  2937 + { "(bad)", { XX } },
  2938 + /* b8 */
  2939 + { "(bad)", { XX } },
  2940 + { "(bad)", { XX } },
  2941 + { "(bad)", { XX } },
  2942 + { "(bad)", { XX } },
  2943 + { "(bad)", { XX } },
  2944 + { "(bad)", { XX } },
  2945 + { "(bad)", { XX } },
  2946 + { "(bad)", { XX } },
  2947 + /* c0 */
  2948 + { "(bad)", { XX } },
  2949 + { "(bad)", { XX } },
  2950 + { "(bad)", { XX } },
  2951 + { "(bad)", { XX } },
  2952 + { "(bad)", { XX } },
  2953 + { "(bad)", { XX } },
  2954 + { "(bad)", { XX } },
  2955 + { "(bad)", { XX } },
  2956 + /* c8 */
  2957 + { "(bad)", { XX } },
  2958 + { "(bad)", { XX } },
  2959 + { "(bad)", { XX } },
  2960 + { "(bad)", { XX } },
  2961 + { "(bad)", { XX } },
  2962 + { "(bad)", { XX } },
  2963 + { "(bad)", { XX } },
  2964 + { "(bad)", { XX } },
  2965 + /* d0 */
  2966 + { "(bad)", { XX } },
  2967 + { "(bad)", { XX } },
  2968 + { "(bad)", { XX } },
  2969 + { "(bad)", { XX } },
  2970 + { "(bad)", { XX } },
  2971 + { "(bad)", { XX } },
  2972 + { "(bad)", { XX } },
  2973 + { "(bad)", { XX } },
  2974 + /* d8 */
  2975 + { "(bad)", { XX } },
  2976 + { "(bad)", { XX } },
  2977 + { "(bad)", { XX } },
  2978 + { "(bad)", { XX } },
  2979 + { "(bad)", { XX } },
  2980 + { "(bad)", { XX } },
  2981 + { "(bad)", { XX } },
  2982 + { "(bad)", { XX } },
  2983 + /* e0 */
  2984 + { "(bad)", { XX } },
  2985 + { "(bad)", { XX } },
  2986 + { "(bad)", { XX } },
  2987 + { "(bad)", { XX } },
  2988 + { "(bad)", { XX } },
  2989 + { "(bad)", { XX } },
  2990 + { "(bad)", { XX } },
  2991 + { "(bad)", { XX } },
  2992 + /* e8 */
  2993 + { "(bad)", { XX } },
  2994 + { "(bad)", { XX } },
  2995 + { "(bad)", { XX } },
  2996 + { "(bad)", { XX } },
  2997 + { "(bad)", { XX } },
  2998 + { "(bad)", { XX } },
  2999 + { "(bad)", { XX } },
  3000 + { "(bad)", { XX } },
  3001 + /* f0 */
  3002 + { PREGRP87 },
  3003 + { PREGRP88 },
  3004 + { "(bad)", { XX } },
  3005 + { "(bad)", { XX } },
  3006 + { "(bad)", { XX } },
  3007 + { "(bad)", { XX } },
  3008 + { "(bad)", { XX } },
  3009 + { "(bad)", { XX } },
  3010 + /* f8 */
  3011 + { "(bad)", { XX } },
  3012 + { "(bad)", { XX } },
  3013 + { "(bad)", { XX } },
  3014 + { "(bad)", { XX } },
  3015 + { "(bad)", { XX } },
  3016 + { "(bad)", { XX } },
  3017 + { "(bad)", { XX } },
  3018 + { "(bad)", { XX } },
1800 3019 },
1801 3020 /* THREE_BYTE_1 */
1802 3021 {
1803   - { "(bad)", XX, XX, XX },
1804   - { "(bad)", XX, XX, XX },
1805   - { "(bad)", XX, XX, XX },
1806   - { "(bad)", XX, XX, XX },
1807   - { "(bad)", XX, XX, XX },
1808   - { "(bad)", XX, XX, XX },
1809   - { "(bad)", XX, XX, XX },
1810   - { "(bad)", XX, XX, XX },
1811   - { "(bad)", XX, XX, XX },
1812   - { "(bad)", XX, XX, XX },
1813   - { "(bad)", XX, XX, XX },
1814   - { "(bad)", XX, XX, XX },
1815   - { "(bad)", XX, XX, XX },
1816   - { "(bad)", XX, XX, XX },
1817   - { "(bad)", XX, XX, XX },
1818   - { "palignr", MX, EM, Ib },
1819   - { "(bad)", XX, XX, XX },
1820   - { "(bad)", XX, XX, XX },
1821   - { "(bad)", XX, XX, XX },
1822   - { "(bad)", XX, XX, XX },
1823   - { "(bad)", XX, XX, XX },
1824   - { "(bad)", XX, XX, XX },
1825   - { "(bad)", XX, XX, XX },
1826   - { "(bad)", XX, XX, XX },
1827   - { "(bad)", XX, XX, XX },
1828   - { "(bad)", XX, XX, XX },
1829   - { "(bad)", XX, XX, XX },
1830   - { "(bad)", XX, XX, XX },
1831   - { "(bad)", XX, XX, XX },
1832   - { "(bad)", XX, XX, XX },
1833   - { "(bad)", XX, XX, XX },
1834   - { "(bad)", XX, XX, XX }
1835   - },
  3022 + /* 00 */
  3023 + { "(bad)", { XX } },
  3024 + { "(bad)", { XX } },
  3025 + { "(bad)", { XX } },
  3026 + { "(bad)", { XX } },
  3027 + { "(bad)", { XX } },
  3028 + { "(bad)", { XX } },
  3029 + { "(bad)", { XX } },
  3030 + { "(bad)", { XX } },
  3031 + /* 08 */
  3032 + { PREGRP69 },
  3033 + { PREGRP70 },
  3034 + { PREGRP71 },
  3035 + { PREGRP72 },
  3036 + { PREGRP73 },
  3037 + { PREGRP74 },
  3038 + { PREGRP75 },
  3039 + { "palignr", { MX, EM, Ib } },
  3040 + /* 10 */
  3041 + { "(bad)", { XX } },
  3042 + { "(bad)", { XX } },
  3043 + { "(bad)", { XX } },
  3044 + { "(bad)", { XX } },
  3045 + { PREGRP76 },
  3046 + { PREGRP77 },
  3047 + { PREGRP78 },
  3048 + { PREGRP79 },
  3049 + /* 18 */
  3050 + { "(bad)", { XX } },
  3051 + { "(bad)", { XX } },
  3052 + { "(bad)", { XX } },
  3053 + { "(bad)", { XX } },
  3054 + { "(bad)", { XX } },
  3055 + { "(bad)", { XX } },
  3056 + { "(bad)", { XX } },
  3057 + { "(bad)", { XX } },
  3058 + /* 20 */
  3059 + { PREGRP80 },
  3060 + { PREGRP81 },
  3061 + { PREGRP82 },
  3062 + { "(bad)", { XX } },
  3063 + { "(bad)", { XX } },
  3064 + { "(bad)", { XX } },
  3065 + { "(bad)", { XX } },
  3066 + { "(bad)", { XX } },
  3067 + /* 28 */
  3068 + { "(bad)", { XX } },
  3069 + { "(bad)", { XX } },
  3070 + { "(bad)", { XX } },
  3071 + { "(bad)", { XX } },
  3072 + { "(bad)", { XX } },
  3073 + { "(bad)", { XX } },
  3074 + { "(bad)", { XX } },
  3075 + { "(bad)", { XX } },
  3076 + /* 30 */
  3077 + { "(bad)", { XX } },
  3078 + { "(bad)", { XX } },
  3079 + { "(bad)", { XX } },
  3080 + { "(bad)", { XX } },
  3081 + { "(bad)", { XX } },
  3082 + { "(bad)", { XX } },
  3083 + { "(bad)", { XX } },
  3084 + { "(bad)", { XX } },
  3085 + /* 38 */
  3086 + { "(bad)", { XX } },
  3087 + { "(bad)", { XX } },
  3088 + { "(bad)", { XX } },
  3089 + { "(bad)", { XX } },
  3090 + { "(bad)", { XX } },
  3091 + { "(bad)", { XX } },
  3092 + { "(bad)", { XX } },
  3093 + { "(bad)", { XX } },
  3094 + /* 40 */
  3095 + { PREGRP83 },
  3096 + { PREGRP84 },
  3097 + { PREGRP85 },
  3098 + { "(bad)", { XX } },
  3099 + { "(bad)", { XX } },
  3100 + { "(bad)", { XX } },
  3101 + { "(bad)", { XX } },
  3102 + { "(bad)", { XX } },
  3103 + /* 48 */
  3104 + { "(bad)", { XX } },
  3105 + { "(bad)", { XX } },
  3106 + { "(bad)", { XX } },
  3107 + { "(bad)", { XX } },
  3108 + { "(bad)", { XX } },
  3109 + { "(bad)", { XX } },
  3110 + { "(bad)", { XX } },
  3111 + { "(bad)", { XX } },
  3112 + /* 50 */
  3113 + { "(bad)", { XX } },
  3114 + { "(bad)", { XX } },
  3115 + { "(bad)", { XX } },
  3116 + { "(bad)", { XX } },
  3117 + { "(bad)", { XX } },
  3118 + { "(bad)", { XX } },
  3119 + { "(bad)", { XX } },
  3120 + { "(bad)", { XX } },
  3121 + /* 58 */
  3122 + { "(bad)", { XX } },
  3123 + { "(bad)", { XX } },
  3124 + { "(bad)", { XX } },
  3125 + { "(bad)", { XX } },
  3126 + { "(bad)", { XX } },
  3127 + { "(bad)", { XX } },
  3128 + { "(bad)", { XX } },
  3129 + { "(bad)", { XX } },
  3130 + /* 60 */
  3131 + { PREGRP89 },
  3132 + { PREGRP90 },
  3133 + { PREGRP91 },
  3134 + { PREGRP92 },
  3135 + { "(bad)", { XX } },
  3136 + { "(bad)", { XX } },
  3137 + { "(bad)", { XX } },
  3138 + { "(bad)", { XX } },
  3139 + /* 68 */
  3140 + { "(bad)", { XX } },
  3141 + { "(bad)", { XX } },
  3142 + { "(bad)", { XX } },
  3143 + { "(bad)", { XX } },
  3144 + { "(bad)", { XX } },
  3145 + { "(bad)", { XX } },
  3146 + { "(bad)", { XX } },
  3147 + { "(bad)", { XX } },
  3148 + /* 70 */
  3149 + { "(bad)", { XX } },
  3150 + { "(bad)", { XX } },
  3151 + { "(bad)", { XX } },
  3152 + { "(bad)", { XX } },
  3153 + { "(bad)", { XX } },
  3154 + { "(bad)", { XX } },
  3155 + { "(bad)", { XX } },
  3156 + { "(bad)", { XX } },
  3157 + /* 78 */
  3158 + { "(bad)", { XX } },
  3159 + { "(bad)", { XX } },
  3160 + { "(bad)", { XX } },
  3161 + { "(bad)", { XX } },
  3162 + { "(bad)", { XX } },
  3163 + { "(bad)", { XX } },
  3164 + { "(bad)", { XX } },
  3165 + { "(bad)", { XX } },
  3166 + /* 80 */
  3167 + { "(bad)", { XX } },
  3168 + { "(bad)", { XX } },
  3169 + { "(bad)", { XX } },
  3170 + { "(bad)", { XX } },
  3171 + { "(bad)", { XX } },
  3172 + { "(bad)", { XX } },
  3173 + { "(bad)", { XX } },
  3174 + { "(bad)", { XX } },
  3175 + /* 88 */
  3176 + { "(bad)", { XX } },
  3177 + { "(bad)", { XX } },
  3178 + { "(bad)", { XX } },
  3179 + { "(bad)", { XX } },
  3180 + { "(bad)", { XX } },
  3181 + { "(bad)", { XX } },
  3182 + { "(bad)", { XX } },
  3183 + { "(bad)", { XX } },
  3184 + /* 90 */
  3185 + { "(bad)", { XX } },
  3186 + { "(bad)", { XX } },
  3187 + { "(bad)", { XX } },
  3188 + { "(bad)", { XX } },
  3189 + { "(bad)", { XX } },
  3190 + { "(bad)", { XX } },
  3191 + { "(bad)", { XX } },
  3192 + { "(bad)", { XX } },
  3193 + /* 98 */
  3194 + { "(bad)", { XX } },
  3195 + { "(bad)", { XX } },
  3196 + { "(bad)", { XX } },
  3197 + { "(bad)", { XX } },
  3198 + { "(bad)", { XX } },
  3199 + { "(bad)", { XX } },
  3200 + { "(bad)", { XX } },
  3201 + { "(bad)", { XX } },
  3202 + /* a0 */
  3203 + { "(bad)", { XX } },
  3204 + { "(bad)", { XX } },
  3205 + { "(bad)", { XX } },
  3206 + { "(bad)", { XX } },
  3207 + { "(bad)", { XX } },
  3208 + { "(bad)", { XX } },
  3209 + { "(bad)", { XX } },
  3210 + { "(bad)", { XX } },
  3211 + /* a8 */
  3212 + { "(bad)", { XX } },
  3213 + { "(bad)", { XX } },
  3214 + { "(bad)", { XX } },
  3215 + { "(bad)", { XX } },
  3216 + { "(bad)", { XX } },
  3217 + { "(bad)", { XX } },
  3218 + { "(bad)", { XX } },
  3219 + { "(bad)", { XX } },
  3220 + /* b0 */
  3221 + { "(bad)", { XX } },
  3222 + { "(bad)", { XX } },
  3223 + { "(bad)", { XX } },
  3224 + { "(bad)", { XX } },
  3225 + { "(bad)", { XX } },
  3226 + { "(bad)", { XX } },
  3227 + { "(bad)", { XX } },
  3228 + { "(bad)", { XX } },
  3229 + /* b8 */
  3230 + { "(bad)", { XX } },
  3231 + { "(bad)", { XX } },
  3232 + { "(bad)", { XX } },
  3233 + { "(bad)", { XX } },
  3234 + { "(bad)", { XX } },
  3235 + { "(bad)", { XX } },
  3236 + { "(bad)", { XX } },
  3237 + { "(bad)", { XX } },
  3238 + /* c0 */
  3239 + { "(bad)", { XX } },
  3240 + { "(bad)", { XX } },
  3241 + { "(bad)", { XX } },
  3242 + { "(bad)", { XX } },
  3243 + { "(bad)", { XX } },
  3244 + { "(bad)", { XX } },
  3245 + { "(bad)", { XX } },
  3246 + { "(bad)", { XX } },
  3247 + /* c8 */
  3248 + { "(bad)", { XX } },
  3249 + { "(bad)", { XX } },
  3250 + { "(bad)", { XX } },
  3251 + { "(bad)", { XX } },
  3252 + { "(bad)", { XX } },
  3253 + { "(bad)", { XX } },
  3254 + { "(bad)", { XX } },
  3255 + { "(bad)", { XX } },
  3256 + /* d0 */
  3257 + { "(bad)", { XX } },
  3258 + { "(bad)", { XX } },
  3259 + { "(bad)", { XX } },
  3260 + { "(bad)", { XX } },
  3261 + { "(bad)", { XX } },
  3262 + { "(bad)", { XX } },
  3263 + { "(bad)", { XX } },
  3264 + { "(bad)", { XX } },
  3265 + /* d8 */
  3266 + { "(bad)", { XX } },
  3267 + { "(bad)", { XX } },
  3268 + { "(bad)", { XX } },
  3269 + { "(bad)", { XX } },
  3270 + { "(bad)", { XX } },
  3271 + { "(bad)", { XX } },
  3272 + { "(bad)", { XX } },
  3273 + { "(bad)", { XX } },
  3274 + /* e0 */
  3275 + { "(bad)", { XX } },
  3276 + { "(bad)", { XX } },
  3277 + { "(bad)", { XX } },
  3278 + { "(bad)", { XX } },
  3279 + { "(bad)", { XX } },
  3280 + { "(bad)", { XX } },
  3281 + { "(bad)", { XX } },
  3282 + { "(bad)", { XX } },
  3283 + /* e8 */
  3284 + { "(bad)", { XX } },
  3285 + { "(bad)", { XX } },
  3286 + { "(bad)", { XX } },
  3287 + { "(bad)", { XX } },
  3288 + { "(bad)", { XX } },
  3289 + { "(bad)", { XX } },
  3290 + { "(bad)", { XX } },
  3291 + { "(bad)", { XX } },
  3292 + /* f0 */
  3293 + { "(bad)", { XX } },
  3294 + { "(bad)", { XX } },
  3295 + { "(bad)", { XX } },
  3296 + { "(bad)", { XX } },
  3297 + { "(bad)", { XX } },
  3298 + { "(bad)", { XX } },
  3299 + { "(bad)", { XX } },
  3300 + { "(bad)", { XX } },
  3301 + /* f8 */
  3302 + { "(bad)", { XX } },
  3303 + { "(bad)", { XX } },
  3304 + { "(bad)", { XX } },
  3305 + { "(bad)", { XX } },
  3306 + { "(bad)", { XX } },
  3307 + { "(bad)", { XX } },
  3308 + { "(bad)", { XX } },
  3309 + { "(bad)", { XX } },
  3310 + }
1836 3311 };
1837 3312  
1838 3313 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
... ... @@ -1938,41 +3413,46 @@ ckprefix (void)
1938 3413 static const char *
1939 3414 prefix_name (int pref, int sizeflag)
1940 3415 {
  3416 + static const char * const rexes [16] =
  3417 + {
  3418 + "rex", /* 0x40 */
  3419 + "rex.B", /* 0x41 */
  3420 + "rex.X", /* 0x42 */
  3421 + "rex.XB", /* 0x43 */
  3422 + "rex.R", /* 0x44 */
  3423 + "rex.RB", /* 0x45 */
  3424 + "rex.RX", /* 0x46 */
  3425 + "rex.RXB", /* 0x47 */
  3426 + "rex.W", /* 0x48 */
  3427 + "rex.WB", /* 0x49 */
  3428 + "rex.WX", /* 0x4a */
  3429 + "rex.WXB", /* 0x4b */
  3430 + "rex.WR", /* 0x4c */
  3431 + "rex.WRB", /* 0x4d */
  3432 + "rex.WRX", /* 0x4e */
  3433 + "rex.WRXB", /* 0x4f */
  3434 + };
  3435 +
1941 3436 switch (pref)
1942 3437 {
1943 3438 /* REX prefixes family. */
1944 3439 case 0x40:
1945   - return "rex";
1946 3440 case 0x41:
1947   - return "rexZ";
1948 3441 case 0x42:
1949   - return "rexY";
1950 3442 case 0x43:
1951   - return "rexYZ";
1952 3443 case 0x44:
1953   - return "rexX";
1954 3444 case 0x45:
1955   - return "rexXZ";
1956 3445 case 0x46:
1957   - return "rexXY";
1958 3446 case 0x47:
1959   - return "rexXYZ";
1960 3447 case 0x48:
1961   - return "rex64";
1962 3448 case 0x49:
1963   - return "rex64Z";
1964 3449 case 0x4a:
1965   - return "rex64Y";
1966 3450 case 0x4b:
1967   - return "rex64YZ";
1968 3451 case 0x4c:
1969   - return "rex64X";
1970 3452 case 0x4d:
1971   - return "rex64XZ";
1972 3453 case 0x4e:
1973   - return "rex64XY";
1974 3454 case 0x4f:
1975   - return "rex64XYZ";
  3455 + return rexes [pref - 0x40];
1976 3456 case 0xf3:
1977 3457 return "repz";
1978 3458 case 0xf2:
... ... @@ -2005,13 +3485,13 @@ prefix_name (int pref, int sizeflag)
2005 3485 }
2006 3486 }
2007 3487  
2008   -static char op1out[100], op2out[100], op3out[100];
2009   -static int op_ad, op_index[3];
  3488 +static char op_out[MAX_OPERANDS][100];
  3489 +static int op_ad, op_index[MAX_OPERANDS];
2010 3490 static int two_source_ops;
2011   -static bfd_vma op_address[3];
2012   -static bfd_vma op_riprel[3];
  3491 +static bfd_vma op_address[MAX_OPERANDS];
  3492 +static bfd_vma op_riprel[MAX_OPERANDS];
2013 3493 static bfd_vma start_pc;
2014   -
  3494 +
2015 3495 /*
2016 3496 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2017 3497 * (see topic "Redundant prefixes" in the "Differences from 8086"
... ... @@ -2040,12 +3520,14 @@ print_insn (bfd_vma pc, disassemble_info *info)
2040 3520 {
2041 3521 const struct dis386 *dp;
2042 3522 int i;
2043   - char *first, *second, *third;
  3523 + char *op_txt[MAX_OPERANDS];
2044 3524 int needcomma;
2045   - unsigned char uses_SSE_prefix, uses_LOCK_prefix;
  3525 + unsigned char uses_DATA_prefix, uses_LOCK_prefix;
  3526 + unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
2046 3527 int sizeflag;
2047 3528 const char *p;
2048 3529 struct dis_private priv;
  3530 + unsigned char op;
2049 3531  
2050 3532 if (info->mach == bfd_mach_x86_64_intel_syntax
2051 3533 || info->mach == bfd_mach_x86_64)
... ... @@ -2094,10 +3576,20 @@ print_insn (bfd_vma pc, disassemble_info *info)
2094 3576 }
2095 3577 else if (strncmp (p, "addr", 4) == 0)
2096 3578 {
2097   - if (p[4] == '1' && p[5] == '6')
2098   - priv.orig_sizeflag &= ~AFLAG;
2099   - else if (p[4] == '3' && p[5] == '2')
2100   - priv.orig_sizeflag |= AFLAG;
  3579 + if (address_mode == mode_64bit)
  3580 + {
  3581 + if (p[4] == '3' && p[5] == '2')
  3582 + priv.orig_sizeflag &= ~AFLAG;
  3583 + else if (p[4] == '6' && p[5] == '4')
  3584 + priv.orig_sizeflag |= AFLAG;
  3585 + }
  3586 + else
  3587 + {
  3588 + if (p[4] == '1' && p[5] == '6')
  3589 + priv.orig_sizeflag &= ~AFLAG;
  3590 + else if (p[4] == '3' && p[5] == '2')
  3591 + priv.orig_sizeflag |= AFLAG;
  3592 + }
2101 3593 }
2102 3594 else if (strncmp (p, "data", 4) == 0)
2103 3595 {
... ... @@ -2152,11 +3644,11 @@ print_insn (bfd_vma pc, disassemble_info *info)
2152 3644 priv.insn_start = pc;
2153 3645  
2154 3646 obuf[0] = 0;
2155   - op1out[0] = 0;
2156   - op2out[0] = 0;
2157   - op3out[0] = 0;
2158   -
2159   - op_index[0] = op_index[1] = op_index[2] = -1;
  3647 + for (i = 0; i < MAX_OPERANDS; ++i)
  3648 + {
  3649 + op_out[i][0] = 0;
  3650 + op_index[i] = -1;
  3651 + }
2160 3652  
2161 3653 the_info = info;
2162 3654 start_pc = pc;
... ... @@ -2212,33 +3704,63 @@ print_insn (bfd_vma pc, disassemble_info *info)
2212 3704 return 1;
2213 3705 }
2214 3706  
  3707 + op = 0;
2215 3708 if (*codep == 0x0f)
2216 3709 {
  3710 + unsigned char threebyte;
2217 3711 FETCH_DATA (info, codep + 2);
2218   - dp = &dis386_twobyte[*++codep];
  3712 + threebyte = *++codep;
  3713 + dp = &dis386_twobyte[threebyte];
2219 3714 need_modrm = twobyte_has_modrm[*codep];
2220   - uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
  3715 + uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
  3716 + uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
  3717 + uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
2221 3718 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
  3719 + codep++;
  3720 + if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
  3721 + {
  3722 + FETCH_DATA (info, codep + 2);
  3723 + op = *codep++;
  3724 + switch (threebyte)
  3725 + {
  3726 + case 0x38:
  3727 + uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
  3728 + uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
  3729 + uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
  3730 + break;
  3731 + case 0x3a:
  3732 + uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
  3733 + uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
  3734 + uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
  3735 + break;
  3736 + default:
  3737 + break;
  3738 + }
  3739 + }
2222 3740 }
2223 3741 else
2224 3742 {
2225 3743 dp = &dis386[*codep];
2226 3744 need_modrm = onebyte_has_modrm[*codep];
2227   - uses_SSE_prefix = 0;
  3745 + uses_DATA_prefix = 0;
  3746 + uses_REPNZ_prefix = 0;
  3747 + /* pause is 0xf3 0x90. */
  3748 + uses_REPZ_prefix = *codep == 0x90;
2228 3749 uses_LOCK_prefix = 0;
  3750 + codep++;
2229 3751 }
2230   - codep++;
2231 3752  
2232   - if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
  3753 + if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
2233 3754 {
2234 3755 oappend ("repz ");
2235 3756 used_prefixes |= PREFIX_REPZ;
2236 3757 }
2237   - if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
  3758 + if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
2238 3759 {
2239 3760 oappend ("repnz ");
2240 3761 used_prefixes |= PREFIX_REPNZ;
2241 3762 }
  3763 +
2242 3764 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2243 3765 {
2244 3766 oappend ("lock ");
... ... @@ -2248,7 +3770,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
2248 3770 if (prefixes & PREFIX_ADDR)
2249 3771 {
2250 3772 sizeflag ^= AFLAG;
2251   - if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
  3773 + if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
2252 3774 {
2253 3775 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
2254 3776 oappend ("addr32 ");
... ... @@ -2258,11 +3780,11 @@ print_insn (bfd_vma pc, disassemble_info *info)
2258 3780 }
2259 3781 }
2260 3782  
2261   - if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
  3783 + if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
2262 3784 {
2263 3785 sizeflag ^= DFLAG;
2264   - if (dp->bytemode3 == cond_jump_mode
2265   - && dp->bytemode1 == v_mode
  3786 + if (dp->op[2].bytemode == cond_jump_mode
  3787 + && dp->op[0].bytemode == v_mode
2266 3788 && !intel_syntax)
2267 3789 {
2268 3790 if (sizeflag & DFLAG)
... ... @@ -2273,23 +3795,22 @@ print_insn (bfd_vma pc, disassemble_info *info)
2273 3795 }
2274 3796 }
2275 3797  
2276   - if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
  3798 + if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
2277 3799 {
2278   - FETCH_DATA (info, codep + 2);
2279   - dp = &three_byte_table[dp->bytemode2][*codep++];
2280   - mod = (*codep >> 6) & 3;
2281   - reg = (*codep >> 3) & 7;
2282   - rm = *codep & 7;
  3800 + dp = &three_byte_table[dp->op[1].bytemode][op];
  3801 + modrm.mod = (*codep >> 6) & 3;
  3802 + modrm.reg = (*codep >> 3) & 7;
  3803 + modrm.rm = *codep & 7;
2283 3804 }
2284 3805 else if (need_modrm)
2285 3806 {
2286 3807 FETCH_DATA (info, codep + 1);
2287   - mod = (*codep >> 6) & 3;
2288   - reg = (*codep >> 3) & 7;
2289   - rm = *codep & 7;
  3808 + modrm.mod = (*codep >> 6) & 3;
  3809 + modrm.reg = (*codep >> 3) & 7;
  3810 + modrm.rm = *codep & 7;
2290 3811 }
2291 3812  
2292   - if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
  3813 + if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
2293 3814 {
2294 3815 dofloat (sizeflag);
2295 3816 }
... ... @@ -2298,10 +3819,10 @@ print_insn (bfd_vma pc, disassemble_info *info)
2298 3819 int index;
2299 3820 if (dp->name == NULL)
2300 3821 {
2301   - switch (dp->bytemode1)
  3822 + switch (dp->op[0].bytemode)
2302 3823 {
2303 3824 case USE_GROUPS:
2304   - dp = &grps[dp->bytemode2][reg];
  3825 + dp = &grps[dp->op[1].bytemode][modrm.reg];
2305 3826 break;
2306 3827  
2307 3828 case USE_PREFIX_USER_TABLE:
... ... @@ -2311,22 +3832,24 @@ print_insn (bfd_vma pc, disassemble_info *info)
2311 3832 index = 1;
2312 3833 else
2313 3834 {
2314   - used_prefixes |= (prefixes & PREFIX_DATA);
2315   - if (prefixes & PREFIX_DATA)
2316   - index = 2;
  3835 + /* We should check PREFIX_REPNZ and PREFIX_REPZ
  3836 + before PREFIX_DATA. */
  3837 + used_prefixes |= (prefixes & PREFIX_REPNZ);
  3838 + if (prefixes & PREFIX_REPNZ)
  3839 + index = 3;
2317 3840 else
2318 3841 {
2319   - used_prefixes |= (prefixes & PREFIX_REPNZ);
2320   - if (prefixes & PREFIX_REPNZ)
2321   - index = 3;
  3842 + used_prefixes |= (prefixes & PREFIX_DATA);
  3843 + if (prefixes & PREFIX_DATA)
  3844 + index = 2;
2322 3845 }
2323 3846 }
2324   - dp = &prefix_user_table[dp->bytemode2][index];
  3847 + dp = &prefix_user_table[dp->op[1].bytemode][index];
2325 3848 break;
2326 3849  
2327 3850 case X86_64_SPECIAL:
2328 3851 index = address_mode == mode_64bit ? 1 : 0;
2329   - dp = &x86_64_table[dp->bytemode2][index];
  3852 + dp = &x86_64_table[dp->op[1].bytemode][index];
2330 3853 break;
2331 3854  
2332 3855 default:
... ... @@ -2336,21 +3859,14 @@ print_insn (bfd_vma pc, disassemble_info *info)
2336 3859 }
2337 3860  
2338 3861 if (putop (dp->name, sizeflag) == 0)
2339   - {
2340   - obufp = op1out;
2341   - op_ad = 2;
2342   - if (dp->op1)
2343   - (*dp->op1) (dp->bytemode1, sizeflag);
2344   -
2345   - obufp = op2out;
2346   - op_ad = 1;
2347   - if (dp->op2)
2348   - (*dp->op2) (dp->bytemode2, sizeflag);
2349   -
2350   - obufp = op3out;
2351   - op_ad = 0;
2352   - if (dp->op3)
2353   - (*dp->op3) (dp->bytemode3, sizeflag);
  3862 + {
  3863 + for (i = 0; i < MAX_OPERANDS; ++i)
  3864 + {
  3865 + obufp = op_out[i];
  3866 + op_ad = MAX_OPERANDS - 1 - i;
  3867 + if (dp->op[i].rtn)
  3868 + (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
  3869 + }
2354 3870 }
2355 3871 }
2356 3872  
... ... @@ -2387,53 +3903,47 @@ print_insn (bfd_vma pc, disassemble_info *info)
2387 3903 order as the intel book; everything else is printed in reverse order. */
2388 3904 if (intel_syntax || two_source_ops)
2389 3905 {
2390   - first = op1out;
2391   - second = op2out;
2392   - third = op3out;
2393   - op_ad = op_index[0];
2394   - op_index[0] = op_index[2];
2395   - op_index[2] = op_ad;
  3906 + bfd_vma riprel;
  3907 +
  3908 + for (i = 0; i < MAX_OPERANDS; ++i)
  3909 + op_txt[i] = op_out[i];
  3910 +
  3911 + for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
  3912 + {
  3913 + op_ad = op_index[i];
  3914 + op_index[i] = op_index[MAX_OPERANDS - 1 - i];
  3915 + op_index[MAX_OPERANDS - 1 - i] = op_ad;
  3916 + riprel = op_riprel[i];
  3917 + op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
  3918 + op_riprel[MAX_OPERANDS - 1 - i] = riprel;
  3919 + }
2396 3920 }
2397 3921 else
2398 3922 {
2399   - first = op3out;
2400   - second = op2out;
2401   - third = op1out;
  3923 + for (i = 0; i < MAX_OPERANDS; ++i)
  3924 + op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
2402 3925 }
  3926 +
2403 3927 needcomma = 0;
2404   - if (*first)
2405   - {
2406   - if (op_index[0] != -1 && !op_riprel[0])
2407   - (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2408   - else
2409   - (*info->fprintf_func) (info->stream, "%s", first);
2410   - needcomma = 1;
2411   - }
2412   - if (*second)
2413   - {
2414   - if (needcomma)
2415   - (*info->fprintf_func) (info->stream, ",");
2416   - if (op_index[1] != -1 && !op_riprel[1])
2417   - (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2418   - else
2419   - (*info->fprintf_func) (info->stream, "%s", second);
2420   - needcomma = 1;
2421   - }
2422   - if (*third)
2423   - {
2424   - if (needcomma)
2425   - (*info->fprintf_func) (info->stream, ",");
2426   - if (op_index[2] != -1 && !op_riprel[2])
2427   - (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2428   - else
2429   - (*info->fprintf_func) (info->stream, "%s", third);
2430   - }
2431   - for (i = 0; i < 3; i++)
  3928 + for (i = 0; i < MAX_OPERANDS; ++i)
  3929 + if (*op_txt[i])
  3930 + {
  3931 + if (needcomma)
  3932 + (*info->fprintf_func) (info->stream, ",");
  3933 + if (op_index[i] != -1 && !op_riprel[i])
  3934 + (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
  3935 + else
  3936 + (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
  3937 + needcomma = 1;
  3938 + }
  3939 +
  3940 + for (i = 0; i < MAX_OPERANDS; i++)
2432 3941 if (op_index[i] != -1 && op_riprel[i])
2433 3942 {
2434 3943 (*info->fprintf_func) (info->stream, " # ");
2435 3944 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2436 3945 + op_address[op_index[i]]), info);
  3946 + break;
2437 3947 }
2438 3948 return codep - priv.the_buffer;
2439 3949 }
... ... @@ -2588,37 +4098,37 @@ static const unsigned char float_mem_mode[] = {
2588 4098 q_mode
2589 4099 };
2590 4100  
2591   -#define ST OP_ST, 0
2592   -#define STi OP_STi, 0
  4101 +#define ST { OP_ST, 0 }
  4102 +#define STi { OP_STi, 0 }
2593 4103  
2594   -#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2595   -#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2596   -#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2597   -#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2598   -#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2599   -#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2600   -#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2601   -#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2602   -#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
  4104 +#define FGRPd9_2 NULL, { { NULL, 0 } }
  4105 +#define FGRPd9_4 NULL, { { NULL, 1 } }
  4106 +#define FGRPd9_5 NULL, { { NULL, 2 } }
  4107 +#define FGRPd9_6 NULL, { { NULL, 3 } }
  4108 +#define FGRPd9_7 NULL, { { NULL, 4 } }
  4109 +#define FGRPda_5 NULL, { { NULL, 5 } }
  4110 +#define FGRPdb_4 NULL, { { NULL, 6 } }
  4111 +#define FGRPde_3 NULL, { { NULL, 7 } }
  4112 +#define FGRPdf_4 NULL, { { NULL, 8 } }
2603 4113  
2604 4114 static const struct dis386 float_reg[][8] = {
2605 4115 /* d8 */
2606 4116 {
2607   - { "fadd", ST, STi, XX },
2608   - { "fmul", ST, STi, XX },
2609   - { "fcom", STi, XX, XX },
2610   - { "fcomp", STi, XX, XX },
2611   - { "fsub", ST, STi, XX },
2612   - { "fsubr", ST, STi, XX },
2613   - { "fdiv", ST, STi, XX },
2614   - { "fdivr", ST, STi, XX },
  4117 + { "fadd", { ST, STi } },
  4118 + { "fmul", { ST, STi } },
  4119 + { "fcom", { STi } },
  4120 + { "fcomp", { STi } },
  4121 + { "fsub", { ST, STi } },
  4122 + { "fsubr", { ST, STi } },
  4123 + { "fdiv", { ST, STi } },
  4124 + { "fdivr", { ST, STi } },
2615 4125 },
2616 4126 /* d9 */
2617 4127 {
2618   - { "fld", STi, XX, XX },
2619   - { "fxch", STi, XX, XX },
  4128 + { "fld", { STi } },
  4129 + { "fxch", { STi } },
2620 4130 { FGRPd9_2 },
2621   - { "(bad)", XX, XX, XX },
  4131 + { "(bad)", { XX } },
2622 4132 { FGRPd9_4 },
2623 4133 { FGRPd9_5 },
2624 4134 { FGRPd9_6 },
... ... @@ -2626,83 +4136,83 @@ static const struct dis386 float_reg[][8] = {
2626 4136 },
2627 4137 /* da */
2628 4138 {
2629   - { "fcmovb", ST, STi, XX },
2630   - { "fcmove", ST, STi, XX },
2631   - { "fcmovbe",ST, STi, XX },
2632   - { "fcmovu", ST, STi, XX },
2633   - { "(bad)", XX, XX, XX },
  4139 + { "fcmovb", { ST, STi } },
  4140 + { "fcmove", { ST, STi } },
  4141 + { "fcmovbe",{ ST, STi } },
  4142 + { "fcmovu", { ST, STi } },
  4143 + { "(bad)", { XX } },
2634 4144 { FGRPda_5 },
2635   - { "(bad)", XX, XX, XX },
2636   - { "(bad)", XX, XX, XX },
  4145 + { "(bad)", { XX } },
  4146 + { "(bad)", { XX } },
2637 4147 },
2638 4148 /* db */
2639 4149 {
2640   - { "fcmovnb",ST, STi, XX },
2641   - { "fcmovne",ST, STi, XX },
2642   - { "fcmovnbe",ST, STi, XX },
2643   - { "fcmovnu",ST, STi, XX },
  4150 + { "fcmovnb",{ ST, STi } },
  4151 + { "fcmovne",{ ST, STi } },
  4152 + { "fcmovnbe",{ ST, STi } },
  4153 + { "fcmovnu",{ ST, STi } },
2644 4154 { FGRPdb_4 },
2645   - { "fucomi", ST, STi, XX },
2646   - { "fcomi", ST, STi, XX },
2647   - { "(bad)", XX, XX, XX },
  4155 + { "fucomi", { ST, STi } },
  4156 + { "fcomi", { ST, STi } },
  4157 + { "(bad)", { XX } },
2648 4158 },
2649 4159 /* dc */
2650 4160 {
2651   - { "fadd", STi, ST, XX },
2652   - { "fmul", STi, ST, XX },
2653   - { "(bad)", XX, XX, XX },
2654   - { "(bad)", XX, XX, XX },
2655   -#if UNIXWARE_COMPAT
2656   - { "fsub", STi, ST, XX },
2657   - { "fsubr", STi, ST, XX },
2658   - { "fdiv", STi, ST, XX },
2659   - { "fdivr", STi, ST, XX },
  4161 + { "fadd", { STi, ST } },
  4162 + { "fmul", { STi, ST } },
  4163 + { "(bad)", { XX } },
  4164 + { "(bad)", { XX } },
  4165 +#if SYSV386_COMPAT
  4166 + { "fsub", { STi, ST } },
  4167 + { "fsubr", { STi, ST } },
  4168 + { "fdiv", { STi, ST } },
  4169 + { "fdivr", { STi, ST } },
2660 4170 #else
2661   - { "fsubr", STi, ST, XX },
2662   - { "fsub", STi, ST, XX },
2663   - { "fdivr", STi, ST, XX },
2664   - { "fdiv", STi, ST, XX },
  4171 + { "fsubr", { STi, ST } },
  4172 + { "fsub", { STi, ST } },
  4173 + { "fdivr", { STi, ST } },
  4174 + { "fdiv", { STi, ST } },
2665 4175 #endif
2666 4176 },
2667 4177 /* dd */
2668 4178 {
2669   - { "ffree", STi, XX, XX },
2670   - { "(bad)", XX, XX, XX },
2671   - { "fst", STi, XX, XX },
2672   - { "fstp", STi, XX, XX },
2673   - { "fucom", STi, XX, XX },
2674   - { "fucomp", STi, XX, XX },
2675   - { "(bad)", XX, XX, XX },
2676   - { "(bad)", XX, XX, XX },
  4179 + { "ffree", { STi } },
  4180 + { "(bad)", { XX } },
  4181 + { "fst", { STi } },
  4182 + { "fstp", { STi } },
  4183 + { "fucom", { STi } },
  4184 + { "fucomp", { STi } },
  4185 + { "(bad)", { XX } },
  4186 + { "(bad)", { XX } },
2677 4187 },
2678 4188 /* de */
2679 4189 {
2680   - { "faddp", STi, ST, XX },
2681   - { "fmulp", STi, ST, XX },
2682   - { "(bad)", XX, XX, XX },
  4190 + { "faddp", { STi, ST } },
  4191 + { "fmulp", { STi, ST } },
  4192 + { "(bad)", { XX } },
2683 4193 { FGRPde_3 },
2684   -#if UNIXWARE_COMPAT
2685   - { "fsubp", STi, ST, XX },
2686   - { "fsubrp", STi, ST, XX },
2687   - { "fdivp", STi, ST, XX },
2688   - { "fdivrp", STi, ST, XX },
  4194 +#if SYSV386_COMPAT
  4195 + { "fsubp", { STi, ST } },
  4196 + { "fsubrp", { STi, ST } },
  4197 + { "fdivp", { STi, ST } },
  4198 + { "fdivrp", { STi, ST } },
2689 4199 #else
2690   - { "fsubrp", STi, ST, XX },
2691   - { "fsubp", STi, ST, XX },
2692   - { "fdivrp", STi, ST, XX },
2693   - { "fdivp", STi, ST, XX },
  4200 + { "fsubrp", { STi, ST } },
  4201 + { "fsubp", { STi, ST } },
  4202 + { "fdivrp", { STi, ST } },
  4203 + { "fdivp", { STi, ST } },
2694 4204 #endif
2695 4205 },
2696 4206 /* df */
2697 4207 {
2698   - { "ffreep", STi, XX, XX },
2699   - { "(bad)", XX, XX, XX },
2700   - { "(bad)", XX, XX, XX },
2701   - { "(bad)", XX, XX, XX },
  4208 + { "ffreep", { STi } },
  4209 + { "(bad)", { XX } },
  4210 + { "(bad)", { XX } },
  4211 + { "(bad)", { XX } },
2702 4212 { FGRPdf_4 },
2703   - { "fucomip",ST, STi, XX },
2704   - { "fcomip", ST, STi, XX },
2705   - { "(bad)", XX, XX, XX },
  4213 + { "fucomip", { ST, STi } },
  4214 + { "fcomip", { ST, STi } },
  4215 + { "(bad)", { XX } },
2706 4216 },
2707 4217 };
2708 4218  
... ... @@ -2762,12 +4272,12 @@ dofloat (int sizeflag)
2762 4272  
2763 4273 floatop = codep[-1];
2764 4274  
2765   - if (mod != 3)
  4275 + if (modrm.mod != 3)
2766 4276 {
2767   - int fp_indx = (floatop - 0xd8) * 8 + reg;
  4277 + int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
2768 4278  
2769 4279 putop (float_mem[fp_indx], sizeflag);
2770   - obufp = op1out;
  4280 + obufp = op_out[0];
2771 4281 op_ad = 2;
2772 4282 OP_E (float_mem_mode[fp_indx], sizeflag);
2773 4283 return;
... ... @@ -2776,28 +4286,28 @@ dofloat (int sizeflag)
2776 4286 MODRM_CHECK;
2777 4287 codep++;
2778 4288  
2779   - dp = &float_reg[floatop - 0xd8][reg];
  4289 + dp = &float_reg[floatop - 0xd8][modrm.reg];
2780 4290 if (dp->name == NULL)
2781 4291 {
2782   - putop (fgrps[dp->bytemode1][rm], sizeflag);
  4292 + putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
2783 4293  
2784 4294 /* Instruction fnstsw is only one with strange arg. */
2785 4295 if (floatop == 0xdf && codep[-1] == 0xe0)
2786   - pstrcpy (op1out, sizeof(op1out), names16[0]);
  4296 + pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
2787 4297 }
2788 4298 else
2789 4299 {
2790 4300 putop (dp->name, sizeflag);
2791 4301  
2792   - obufp = op1out;
  4302 + obufp = op_out[0];
2793 4303 op_ad = 2;
2794   - if (dp->op1)
2795   - (*dp->op1) (dp->bytemode1, sizeflag);
  4304 + if (dp->op[0].rtn)
  4305 + (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
2796 4306  
2797   - obufp = op2out;
  4307 + obufp = op_out[1];
2798 4308 op_ad = 1;
2799   - if (dp->op2)
2800   - (*dp->op2) (dp->bytemode2, sizeflag);
  4309 + if (dp->op[1].rtn)
  4310 + (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
2801 4311 }
2802 4312 }
2803 4313  
... ... @@ -2810,7 +4320,7 @@ OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2810 4320 static void
2811 4321 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2812 4322 {
2813   - snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", rm);
  4323 + snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
2814 4324 oappend (scratchbuf + intel_syntax);
2815 4325 }
2816 4326  
... ... @@ -2866,7 +4376,7 @@ putop (const char *template, int sizeflag)
2866 4376 case 'A':
2867 4377 if (intel_syntax)
2868 4378 break;
2869   - if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
  4379 + if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2870 4380 *obufp++ = 'b';
2871 4381 break;
2872 4382 case 'B':
... ... @@ -2887,6 +4397,23 @@ putop (const char *template, int sizeflag)
2887 4397 used_prefixes |= (prefixes & PREFIX_DATA);
2888 4398 }
2889 4399 break;
  4400 + case 'D':
  4401 + if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
  4402 + break;
  4403 + USED_REX (REX_W);
  4404 + if (modrm.mod == 3)
  4405 + {
  4406 + if (rex & REX_W)
  4407 + *obufp++ = 'q';
  4408 + else if (sizeflag & DFLAG)
  4409 + *obufp++ = intel_syntax ? 'd' : 'l';
  4410 + else
  4411 + *obufp++ = 'w';
  4412 + used_prefixes |= (prefixes & PREFIX_DATA);
  4413 + }
  4414 + else
  4415 + *obufp++ = 'w';
  4416 + break;
2890 4417 case 'E': /* For jcxz/jecxz */
2891 4418 if (address_mode == mode_64bit)
2892 4419 {
... ... @@ -2912,6 +4439,16 @@ putop (const char *template, int sizeflag)
2912 4439 used_prefixes |= (prefixes & PREFIX_ADDR);
2913 4440 }
2914 4441 break;
  4442 + case 'G':
  4443 + if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
  4444 + break;
  4445 + if ((rex & REX_W) || (sizeflag & DFLAG))
  4446 + *obufp++ = 'l';
  4447 + else
  4448 + *obufp++ = 'w';
  4449 + if (!(rex & REX_W))
  4450 + used_prefixes |= (prefixes & PREFIX_DATA);
  4451 + break;
2915 4452 case 'H':
2916 4453 if (intel_syntax)
2917 4454 break;
... ... @@ -2932,6 +4469,13 @@ putop (const char *template, int sizeflag)
2932 4469 break;
2933 4470 *obufp++ = 'l';
2934 4471 break;
  4472 + case 'K':
  4473 + USED_REX (REX_W);
  4474 + if (rex & REX_W)
  4475 + *obufp++ = 'q';
  4476 + else
  4477 + *obufp++ = 'd';
  4478 + break;
2935 4479 case 'Z':
2936 4480 if (intel_syntax)
2937 4481 break;
... ... @@ -2954,11 +4498,15 @@ putop (const char *template, int sizeflag)
2954 4498 used_prefixes |= PREFIX_FWAIT;
2955 4499 break;
2956 4500 case 'O':
2957   - USED_REX (REX_MODE64);
2958   - if (rex & REX_MODE64)
  4501 + USED_REX (REX_W);
  4502 + if (rex & REX_W)
2959 4503 *obufp++ = 'o';
  4504 + else if (intel_syntax && (sizeflag & DFLAG))
  4505 + *obufp++ = 'q';
2960 4506 else
2961 4507 *obufp++ = 'd';
  4508 + if (!(rex & REX_W))
  4509 + used_prefixes |= (prefixes & PREFIX_DATA);
2962 4510 break;
2963 4511 case 'T':
2964 4512 if (intel_syntax)
... ... @@ -2973,11 +4521,11 @@ putop (const char *template, int sizeflag)
2973 4521 if (intel_syntax)
2974 4522 break;
2975 4523 if ((prefixes & PREFIX_DATA)
2976   - || (rex & REX_MODE64)
  4524 + || (rex & REX_W)
2977 4525 || (sizeflag & SUFFIX_ALWAYS))
2978 4526 {
2979   - USED_REX (REX_MODE64);
2980   - if (rex & REX_MODE64)
  4527 + USED_REX (REX_W);
  4528 + if (rex & REX_W)
2981 4529 *obufp++ = 'q';
2982 4530 else
2983 4531 {
... ... @@ -2994,7 +4542,7 @@ putop (const char *template, int sizeflag)
2994 4542 break;
2995 4543 if (address_mode == mode_64bit && (sizeflag & DFLAG))
2996 4544 {
2997   - if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
  4545 + if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2998 4546 *obufp++ = 'q';
2999 4547 break;
3000 4548 }
... ... @@ -3002,10 +4550,10 @@ putop (const char *template, int sizeflag)
3002 4550 case 'Q':
3003 4551 if (intel_syntax && !alt)
3004 4552 break;
3005   - USED_REX (REX_MODE64);
3006   - if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
  4553 + USED_REX (REX_W);
  4554 + if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3007 4555 {
3008   - if (rex & REX_MODE64)
  4556 + if (rex & REX_W)
3009 4557 *obufp++ = 'q';
3010 4558 else
3011 4559 {
... ... @@ -3018,35 +4566,22 @@ putop (const char *template, int sizeflag)
3018 4566 }
3019 4567 break;
3020 4568 case 'R':
3021   - USED_REX (REX_MODE64);
3022   - if (intel_syntax)
  4569 + USED_REX (REX_W);
  4570 + if (rex & REX_W)
  4571 + *obufp++ = 'q';
  4572 + else if (sizeflag & DFLAG)
3023 4573 {
3024   - if (rex & REX_MODE64)
3025   - {
3026   - *obufp++ = 'q';
3027   - *obufp++ = 't';
3028   - }
3029   - else if (sizeflag & DFLAG)
3030   - {
  4574 + if (intel_syntax)
3031 4575 *obufp++ = 'd';
3032   - *obufp++ = 'q';
3033   - }
3034 4576 else
3035   - {
3036   - *obufp++ = 'w';
3037   - *obufp++ = 'd';
3038   - }
  4577 + *obufp++ = 'l';
3039 4578 }
3040 4579 else
3041   - {
3042   - if (rex & REX_MODE64)
3043   - *obufp++ = 'q';
3044   - else if (sizeflag & DFLAG)
3045   - *obufp++ = 'l';
3046   - else
3047   - *obufp++ = 'w';
3048   - }
3049   - if (!(rex & REX_MODE64))
  4580 + *obufp++ = 'w';
  4581 + if (intel_syntax && !p[1]
  4582 + && ((rex & REX_W) || (sizeflag & DFLAG)))
  4583 + *obufp++ = 'e';
  4584 + if (!(rex & REX_W))
3050 4585 used_prefixes |= (prefixes & PREFIX_DATA);
3051 4586 break;
3052 4587 case 'V':
... ... @@ -3064,7 +4599,7 @@ putop (const char *template, int sizeflag)
3064 4599 break;
3065 4600 if (sizeflag & SUFFIX_ALWAYS)
3066 4601 {
3067   - if (rex & REX_MODE64)
  4602 + if (rex & REX_W)
3068 4603 *obufp++ = 'q';
3069 4604 else
3070 4605 {
... ... @@ -3086,40 +4621,28 @@ putop (const char *template, int sizeflag)
3086 4621 case 'Y':
3087 4622 if (intel_syntax)
3088 4623 break;
3089   - if (rex & REX_MODE64)
  4624 + if (rex & REX_W)
3090 4625 {
3091   - USED_REX (REX_MODE64);
  4626 + USED_REX (REX_W);
3092 4627 *obufp++ = 'q';
3093 4628 }
3094 4629 break;
3095 4630 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3096 4631 case 'W':
3097 4632 /* operand size flag for cwtl, cbtw */
3098   - USED_REX (0);
3099   - if (rex)
3100   - *obufp++ = 'l';
  4633 + USED_REX (REX_W);
  4634 + if (rex & REX_W)
  4635 + {
  4636 + if (intel_syntax)
  4637 + *obufp++ = 'd';
  4638 + else
  4639 + *obufp++ = 'l';
  4640 + }
3101 4641 else if (sizeflag & DFLAG)
3102 4642 *obufp++ = 'w';
3103 4643 else
3104 4644 *obufp++ = 'b';
3105   - if (intel_syntax)
3106   - {
3107   - if (rex)
3108   - {
3109   - *obufp++ = 'q';
3110   - *obufp++ = 'e';
3111   - }
3112   - if (sizeflag & DFLAG)
3113   - {
3114   - *obufp++ = 'd';
3115   - *obufp++ = 'e';
3116   - }
3117   - else
3118   - {
3119   - *obufp++ = 'w';
3120   - }
3121   - }
3122   - if (!rex)
  4645 + if (!(rex & REX_W))
3123 4646 used_prefixes |= (prefixes & PREFIX_DATA);
3124 4647 break;
3125 4648 }
... ... @@ -3236,12 +4759,57 @@ print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
3236 4759 }
3237 4760 }
3238 4761  
  4762 +/* Put DISP in BUF as signed hex number. */
  4763 +
  4764 +static void
  4765 +print_displacement (char *buf, bfd_vma disp)
  4766 +{
  4767 + bfd_signed_vma val = disp;
  4768 + char tmp[30];
  4769 + int i, j = 0;
  4770 +
  4771 + if (val < 0)
  4772 + {
  4773 + buf[j++] = '-';
  4774 + val = -disp;
  4775 +
  4776 + /* Check for possible overflow. */
  4777 + if (val < 0)
  4778 + {
  4779 + switch (address_mode)
  4780 + {
  4781 + case mode_64bit:
  4782 + strcpy (buf + j, "0x8000000000000000");
  4783 + break;
  4784 + case mode_32bit:
  4785 + strcpy (buf + j, "0x80000000");
  4786 + break;
  4787 + case mode_16bit:
  4788 + strcpy (buf + j, "0x8000");
  4789 + break;
  4790 + }
  4791 + return;
  4792 + }
  4793 + }
  4794 +
  4795 + buf[j++] = '0';
  4796 + buf[j++] = 'x';
  4797 +
  4798 + snprintf_vma (tmp, sizeof(tmp), val);
  4799 + for (i = 0; tmp[i] == '0'; i++)
  4800 + continue;
  4801 + if (tmp[i] == '\0')
  4802 + i--;
  4803 + strcpy (buf + j, tmp + i);
  4804 +}
  4805 +
3239 4806 static void
3240 4807 intel_operand_size (int bytemode, int sizeflag)
3241 4808 {
3242 4809 switch (bytemode)
3243 4810 {
3244 4811 case b_mode:
  4812 + case dqb_mode:
3245 4813 oappend ("BYTE PTR ");
3246 4814 break;
3247 4815 case w_mode:
... ... @@ -3258,8 +4826,8 @@ intel_operand_size (int bytemode, int sizeflag)
3258 4826 /* FALLTHRU */
3259 4827 case v_mode:
3260 4828 case dq_mode:
3261   - USED_REX (REX_MODE64);
3262   - if (rex & REX_MODE64)
  4829 + USED_REX (REX_W);
  4830 + if (rex & REX_W)
3263 4831 oappend ("QWORD PTR ");
3264 4832 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3265 4833 oappend ("DWORD PTR ");
... ... @@ -3267,7 +4835,15 @@ intel_operand_size (int bytemode, int sizeflag)
3267 4835 oappend ("WORD PTR ");
3268 4836 used_prefixes |= (prefixes & PREFIX_DATA);
3269 4837 break;
  4838 + case z_mode:
  4839 + if ((rex & REX_W) || (sizeflag & DFLAG))
  4840 + *obufp++ = 'D';
  4841 + oappend ("WORD PTR ");
  4842 + if (!(rex & REX_W))
  4843 + used_prefixes |= (prefixes & PREFIX_DATA);
  4844 + break;
3270 4845 case d_mode:
  4846 + case dqd_mode:
3271 4847 oappend ("DWORD PTR ");
3272 4848 break;
3273 4849 case q_mode:
... ... @@ -3292,6 +4868,9 @@ intel_operand_size (int bytemode, int sizeflag)
3292 4868 case x_mode:
3293 4869 oappend ("XMMWORD PTR ");
3294 4870 break;
  4871 + case o_mode:
  4872 + oappend ("OWORD PTR ");
  4873 + break;
3295 4874 default:
3296 4875 break;
3297 4876 }
... ... @@ -3303,44 +4882,44 @@ OP_E (int bytemode, int sizeflag)
3303 4882 bfd_vma disp;
3304 4883 int add = 0;
3305 4884 int riprel = 0;
3306   - USED_REX (REX_EXTZ);
3307   - if (rex & REX_EXTZ)
  4885 + USED_REX (REX_B);
  4886 + if (rex & REX_B)
3308 4887 add += 8;
3309 4888  
3310 4889 /* Skip mod/rm byte. */
3311 4890 MODRM_CHECK;
3312 4891 codep++;
3313 4892  
3314   - if (mod == 3)
  4893 + if (modrm.mod == 3)
3315 4894 {
3316 4895 switch (bytemode)
3317 4896 {
3318 4897 case b_mode:
3319 4898 USED_REX (0);
3320 4899 if (rex)
3321   - oappend (names8rex[rm + add]);
  4900 + oappend (names8rex[modrm.rm + add]);
3322 4901 else
3323   - oappend (names8[rm + add]);
  4902 + oappend (names8[modrm.rm + add]);
3324 4903 break;
3325 4904 case w_mode:
3326   - oappend (names16[rm + add]);
  4905 + oappend (names16[modrm.rm + add]);
3327 4906 break;
3328 4907 case d_mode:
3329   - oappend (names32[rm + add]);
  4908 + oappend (names32[modrm.rm + add]);
3330 4909 break;
3331 4910 case q_mode:
3332   - oappend (names64[rm + add]);
  4911 + oappend (names64[modrm.rm + add]);
3333 4912 break;
3334 4913 case m_mode:
3335 4914 if (address_mode == mode_64bit)
3336   - oappend (names64[rm + add]);
  4915 + oappend (names64[modrm.rm + add]);
3337 4916 else
3338   - oappend (names32[rm + add]);
  4917 + oappend (names32[modrm.rm + add]);
3339 4918 break;
3340 4919 case stack_v_mode:
3341 4920 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3342 4921 {
3343   - oappend (names64[rm + add]);
  4922 + oappend (names64[modrm.rm + add]);
3344 4923 used_prefixes |= (prefixes & PREFIX_DATA);
3345 4924 break;
3346 4925 }
... ... @@ -3348,14 +4927,16 @@ OP_E (int bytemode, int sizeflag)
3348 4927 /* FALLTHRU */
3349 4928 case v_mode:
3350 4929 case dq_mode:
  4930 + case dqb_mode:
  4931 + case dqd_mode:
3351 4932 case dqw_mode:
3352   - USED_REX (REX_MODE64);
3353   - if (rex & REX_MODE64)
3354   - oappend (names64[rm + add]);
  4933 + USED_REX (REX_W);
  4934 + if (rex & REX_W)
  4935 + oappend (names64[modrm.rm + add]);
3355 4936 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3356   - oappend (names32[rm + add]);
  4937 + oappend (names32[modrm.rm + add]);
3357 4938 else
3358   - oappend (names16[rm + add]);
  4939 + oappend (names16[modrm.rm + add]);
3359 4940 used_prefixes |= (prefixes & PREFIX_DATA);
3360 4941 break;
3361 4942 case 0:
... ... @@ -3372,8 +4953,10 @@ OP_E (int bytemode, int sizeflag)
3372 4953 intel_operand_size (bytemode, sizeflag);
3373 4954 append_seg ();
3374 4955  
3375   - if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
  4956 + if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3376 4957 {
  4958 + /* 32/64 bit address mode */
  4959 + int havedisp;
3377 4960 int havesib;
3378 4961 int havebase;
3379 4962 int base;
... ... @@ -3382,7 +4965,7 @@ OP_E (int bytemode, int sizeflag)
3382 4965  
3383 4966 havesib = 0;
3384 4967 havebase = 1;
3385   - base = rm;
  4968 + base = modrm.rm;
3386 4969  
3387 4970 if (base == 4)
3388 4971 {
... ... @@ -3393,14 +4976,14 @@ OP_E (int bytemode, int sizeflag)
3393 4976 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3394 4977 scale = (*codep >> 6) & 3;
3395 4978 base = *codep & 7;
3396   - USED_REX (REX_EXTY);
3397   - if (rex & REX_EXTY)
  4979 + USED_REX (REX_X);
  4980 + if (rex & REX_X)
3398 4981 index += 8;
3399 4982 codep++;
3400 4983 }
3401 4984 base += add;
3402 4985  
3403   - switch (mod)
  4986 + switch (modrm.mod)
3404 4987 {
3405 4988 case 0:
3406 4989 if ((base & 7) == 5)
... ... @@ -3422,10 +5005,15 @@ OP_E (int bytemode, int sizeflag)
3422 5005 break;
3423 5006 }
3424 5007  
  5008 + havedisp = havebase || (havesib && (index != 4 || scale != 0));
  5009 +
3425 5010 if (!intel_syntax)
3426   - if (mod != 0 || (base & 7) == 5)
  5011 + if (modrm.mod != 0 || (base & 7) == 5)
3427 5012 {
3428   - print_operand_value (scratchbuf, sizeof(scratchbuf), !riprel, disp);
  5013 + if (havedisp || riprel)
  5014 + print_displacement (scratchbuf, disp);
  5015 + else
  5016 + print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
3429 5017 oappend (scratchbuf);
3430 5018 if (riprel)
3431 5019 {
... ... @@ -3434,11 +5022,14 @@ OP_E (int bytemode, int sizeflag)
3434 5022 }
3435 5023 }
3436 5024  
3437   - if (havebase || (havesib && (index != 4 || scale != 0)))
  5025 + if (havedisp || (intel_syntax && riprel))
3438 5026 {
3439 5027 *obufp++ = open_char;
3440 5028 if (intel_syntax && riprel)
3441   - oappend ("rip + ");
  5029 + {
  5030 + set_op (disp, 1);
  5031 + oappend ("rip");
  5032 + }
3442 5033 *obufp = '\0';
3443 5034 if (havebase)
3444 5035 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
... ... @@ -3463,22 +5054,22 @@ OP_E (int bytemode, int sizeflag)
3463 5054 oappend (scratchbuf);
3464 5055 }
3465 5056 }
3466   - if (intel_syntax && disp)
  5057 + if (intel_syntax
  5058 + && (disp || modrm.mod != 0 || (base & 7) == 5))
3467 5059 {
3468   - if ((bfd_signed_vma) disp > 0)
  5060 + if ((bfd_signed_vma) disp >= 0)
3469 5061 {
3470 5062 *obufp++ = '+';
3471 5063 *obufp = '\0';
3472 5064 }
3473   - else if (mod != 1)
  5065 + else if (modrm.mod != 1)
3474 5066 {
3475 5067 *obufp++ = '-';
3476 5068 *obufp = '\0';
3477 5069 disp = - (bfd_signed_vma) disp;
3478 5070 }
3479 5071  
3480   - print_operand_value (scratchbuf, sizeof(scratchbuf), mod != 1,
3481   - disp);
  5072 + print_displacement (scratchbuf, disp);
3482 5073 oappend (scratchbuf);
3483 5074 }
3484 5075  
... ... @@ -3487,7 +5078,7 @@ OP_E (int bytemode, int sizeflag)
3487 5078 }
3488 5079 else if (intel_syntax)
3489 5080 {
3490   - if (mod != 0 || (base & 7) == 5)
  5081 + if (modrm.mod != 0 || (base & 7) == 5)
3491 5082 {
3492 5083 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3493 5084 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
... ... @@ -3504,10 +5095,10 @@ OP_E (int bytemode, int sizeflag)
3504 5095 }
3505 5096 else
3506 5097 { /* 16 bit address mode */
3507   - switch (mod)
  5098 + switch (modrm.mod)
3508 5099 {
3509 5100 case 0:
3510   - if (rm == 6)
  5101 + if (modrm.rm == 6)
3511 5102 {
3512 5103 disp = get16 ();
3513 5104 if ((disp & 0x8000) != 0)
... ... @@ -3528,33 +5119,33 @@ OP_E (int bytemode, int sizeflag)
3528 5119 }
3529 5120  
3530 5121 if (!intel_syntax)
3531   - if (mod != 0 || rm == 6)
  5122 + if (modrm.mod != 0 || modrm.rm == 6)
3532 5123 {
3533   - print_operand_value (scratchbuf, sizeof(scratchbuf), 0, disp);
  5124 + print_displacement (scratchbuf, disp);
3534 5125 oappend (scratchbuf);
3535 5126 }
3536 5127  
3537   - if (mod != 0 || rm != 6)
  5128 + if (modrm.mod != 0 || modrm.rm != 6)
3538 5129 {
3539 5130 *obufp++ = open_char;
3540 5131 *obufp = '\0';
3541   - oappend (index16[rm]);
3542   - if (intel_syntax && disp)
  5132 + oappend (index16[modrm.rm]);
  5133 + if (intel_syntax
  5134 + && (disp || modrm.mod != 0 || modrm.rm == 6))
3543 5135 {
3544   - if ((bfd_signed_vma) disp > 0)
  5136 + if ((bfd_signed_vma) disp >= 0)
3545 5137 {
3546 5138 *obufp++ = '+';
3547 5139 *obufp = '\0';
3548 5140 }
3549   - else if (mod != 1)
  5141 + else if (modrm.mod != 1)
3550 5142 {
3551 5143 *obufp++ = '-';
3552 5144 *obufp = '\0';
3553 5145 disp = - (bfd_signed_vma) disp;
3554 5146 }
3555 5147  
3556   - print_operand_value (scratchbuf, sizeof(scratchbuf), mod != 1,
3557   - disp);
  5148 + print_displacement (scratchbuf, disp);
3558 5149 oappend (scratchbuf);
3559 5150 }
3560 5151  
... ... @@ -3582,44 +5173,46 @@ static void
3582 5173 OP_G (int bytemode, int sizeflag)
3583 5174 {
3584 5175 int add = 0;
3585   - USED_REX (REX_EXTX);
3586   - if (rex & REX_EXTX)
  5176 + USED_REX (REX_R);
  5177 + if (rex & REX_R)
3587 5178 add += 8;
3588 5179 switch (bytemode)
3589 5180 {
3590 5181 case b_mode:
3591 5182 USED_REX (0);
3592 5183 if (rex)
3593   - oappend (names8rex[reg + add]);
  5184 + oappend (names8rex[modrm.reg + add]);
3594 5185 else
3595   - oappend (names8[reg + add]);
  5186 + oappend (names8[modrm.reg + add]);
3596 5187 break;
3597 5188 case w_mode:
3598   - oappend (names16[reg + add]);
  5189 + oappend (names16[modrm.reg + add]);
3599 5190 break;
3600 5191 case d_mode:
3601   - oappend (names32[reg + add]);
  5192 + oappend (names32[modrm.reg + add]);
3602 5193 break;
3603 5194 case q_mode:
3604   - oappend (names64[reg + add]);
  5195 + oappend (names64[modrm.reg + add]);
3605 5196 break;
3606 5197 case v_mode:
3607 5198 case dq_mode:
  5199 + case dqb_mode:
  5200 + case dqd_mode:
3608 5201 case dqw_mode:
3609   - USED_REX (REX_MODE64);
3610   - if (rex & REX_MODE64)
3611   - oappend (names64[reg + add]);
  5202 + USED_REX (REX_W);
  5203 + if (rex & REX_W)
  5204 + oappend (names64[modrm.reg + add]);
3612 5205 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3613   - oappend (names32[reg + add]);
  5206 + oappend (names32[modrm.reg + add]);
3614 5207 else
3615   - oappend (names16[reg + add]);
  5208 + oappend (names16[modrm.reg + add]);
3616 5209 used_prefixes |= (prefixes & PREFIX_DATA);
3617 5210 break;
3618 5211 case m_mode:
3619 5212 if (address_mode == mode_64bit)
3620   - oappend (names64[reg + add]);
  5213 + oappend (names64[modrm.reg + add]);
3621 5214 else
3622   - oappend (names32[reg + add]);
  5215 + oappend (names32[modrm.reg + add]);
3623 5216 break;
3624 5217 default:
3625 5218 oappend (INTERNAL_DISASSEMBLER_ERROR);
... ... @@ -3714,18 +5307,12 @@ OP_REG (int code, int sizeflag)
3714 5307 {
3715 5308 const char *s;
3716 5309 int add = 0;
3717   - USED_REX (REX_EXTZ);
3718   - if (rex & REX_EXTZ)
  5310 + USED_REX (REX_B);
  5311 + if (rex & REX_B)
3719 5312 add = 8;
3720 5313  
3721 5314 switch (code)
3722 5315 {
3723   - case indir_dx_reg:
3724   - if (intel_syntax)
3725   - s = "[dx]";
3726   - else
3727   - s = "(%dx)";
3728   - break;
3729 5316 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3730 5317 case sp_reg: case bp_reg: case si_reg: case di_reg:
3731 5318 s = names16[code - ax_reg + add];
... ... @@ -3753,8 +5340,8 @@ OP_REG (int code, int sizeflag)
3753 5340 /* Fall through. */
3754 5341 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3755 5342 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3756   - USED_REX (REX_MODE64);
3757   - if (rex & REX_MODE64)
  5343 + USED_REX (REX_W);
  5344 + if (rex & REX_W)
3758 5345 s = names64[code - eAX_reg + add];
3759 5346 else if (sizeflag & DFLAG)
3760 5347 s = names32[code - eAX_reg + add];
... ... @@ -3778,7 +5365,7 @@ OP_IMREG (int code, int sizeflag)
3778 5365 {
3779 5366 case indir_dx_reg:
3780 5367 if (intel_syntax)
3781   - s = "[dx]";
  5368 + s = "dx";
3782 5369 else
3783 5370 s = "(%dx)";
3784 5371 break;
... ... @@ -3800,8 +5387,8 @@ OP_IMREG (int code, int sizeflag)
3800 5387 break;
3801 5388 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3802 5389 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3803   - USED_REX (REX_MODE64);
3804   - if (rex & REX_MODE64)
  5390 + USED_REX (REX_W);
  5391 + if (rex & REX_W)
3805 5392 s = names64[code - eAX_reg];
3806 5393 else if (sizeflag & DFLAG)
3807 5394 s = names32[code - eAX_reg];
... ... @@ -3809,6 +5396,14 @@ OP_IMREG (int code, int sizeflag)
3809 5396 s = names16[code - eAX_reg];
3810 5397 used_prefixes |= (prefixes & PREFIX_DATA);
3811 5398 break;
  5399 + case z_mode_ax_reg:
  5400 + if ((rex & REX_W) || (sizeflag & DFLAG))
  5401 + s = *names32;
  5402 + else
  5403 + s = *names16;
  5404 + if (!(rex & REX_W))
  5405 + used_prefixes |= (prefixes & PREFIX_DATA);
  5406 + break;
3812 5407 default:
3813 5408 s = INTERNAL_DISASSEMBLER_ERROR;
3814 5409 break;
... ... @@ -3837,8 +5432,8 @@ OP_I (int bytemode, int sizeflag)
3837 5432 }
3838 5433 /* Fall through. */
3839 5434 case v_mode:
3840   - USED_REX (REX_MODE64);
3841   - if (rex & REX_MODE64)
  5435 + USED_REX (REX_W);
  5436 + if (rex & REX_W)
3842 5437 op = get32s ();
3843 5438 else if (sizeflag & DFLAG)
3844 5439 {
... ... @@ -3892,8 +5487,8 @@ OP_I64 (int bytemode, int sizeflag)
3892 5487 mask = 0xff;
3893 5488 break;
3894 5489 case v_mode:
3895   - USED_REX (REX_MODE64);
3896   - if (rex & REX_MODE64)
  5490 + USED_REX (REX_W);
  5491 + if (rex & REX_W)
3897 5492 op = get64 ();
3898 5493 else if (sizeflag & DFLAG)
3899 5494 {
... ... @@ -3939,8 +5534,8 @@ OP_sI (int bytemode, int sizeflag)
3939 5534 mask = 0xffffffff;
3940 5535 break;
3941 5536 case v_mode:
3942   - USED_REX (REX_MODE64);
3943   - if (rex & REX_MODE64)
  5537 + USED_REX (REX_W);
  5538 + if (rex & REX_W)
3944 5539 op = get32s ();
3945 5540 else if (sizeflag & DFLAG)
3946 5541 {
... ... @@ -3977,6 +5572,7 @@ OP_J (int bytemode, int sizeflag)
3977 5572 {
3978 5573 bfd_vma disp;
3979 5574 bfd_vma mask = -1;
  5575 + bfd_vma segment = 0;
3980 5576  
3981 5577 switch (bytemode)
3982 5578 {
... ... @@ -3987,31 +5583,41 @@ OP_J (int bytemode, int sizeflag)
3987 5583 disp -= 0x100;
3988 5584 break;
3989 5585 case v_mode:
3990   - if ((sizeflag & DFLAG) || (rex & REX_MODE64))
  5586 + if ((sizeflag & DFLAG) || (rex & REX_W))
3991 5587 disp = get32s ();
3992 5588 else
3993 5589 {
3994 5590 disp = get16 ();
3995   - /* For some reason, a data16 prefix on a jump instruction
3996   - means that the pc is masked to 16 bits after the
3997   - displacement is added! */
  5591 + if ((disp & 0x8000) != 0)
  5592 + disp -= 0x10000;
  5593 + /* In 16bit mode, address is wrapped around at 64k within
  5594 + the same segment. Otherwise, a data16 prefix on a jump
  5595 + instruction means that the pc is masked to 16 bits after
  5596 + the displacement is added! */
3998 5597 mask = 0xffff;
  5598 + if ((prefixes & PREFIX_DATA) == 0)
  5599 + segment = ((start_pc + codep - start_codep)
  5600 + & ~((bfd_vma) 0xffff));
3999 5601 }
  5602 + used_prefixes |= (prefixes & PREFIX_DATA);
4000 5603 break;
4001 5604 default:
4002 5605 oappend (INTERNAL_DISASSEMBLER_ERROR);
4003 5606 return;
4004 5607 }
4005   - disp = (start_pc + codep - start_codep + disp) & mask;
  5608 + disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
4006 5609 set_op (disp, 0);
4007 5610 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
4008 5611 oappend (scratchbuf);
4009 5612 }
4010 5613  
4011 5614 static void
4012   -OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
  5615 +OP_SEG (int bytemode, int sizeflag)
4013 5616 {
4014   - oappend (names_seg[reg]);
  5617 + if (bytemode == w_mode)
  5618 + oappend (names_seg[modrm.reg]);
  5619 + else
  5620 + OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
4015 5621 }
4016 5622  
4017 5623 static void
... ... @@ -4069,7 +5675,8 @@ OP_OFF64 (int bytemode, int sizeflag)
4069 5675 {
4070 5676 bfd_vma off;
4071 5677  
4072   - if (address_mode != mode_64bit)
  5678 + if (address_mode != mode_64bit
  5679 + || (prefixes & PREFIX_ADDR))
4073 5680 {
4074 5681 OP_OFF (bytemode, sizeflag);
4075 5682 return;
... ... @@ -4121,7 +5728,22 @@ static void
4121 5728 OP_ESreg (int code, int sizeflag)
4122 5729 {
4123 5730 if (intel_syntax)
4124   - intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
  5731 + {
  5732 + switch (codep[-1])
  5733 + {
  5734 + case 0x6d: /* insw/insl */
  5735 + intel_operand_size (z_mode, sizeflag);
  5736 + break;
  5737 + case 0xa5: /* movsw/movsl/movsq */
  5738 + case 0xa7: /* cmpsw/cmpsl/cmpsq */
  5739 + case 0xab: /* stosw/stosl */
  5740 + case 0xaf: /* scasw/scasl */
  5741 + intel_operand_size (v_mode, sizeflag);
  5742 + break;
  5743 + default:
  5744 + intel_operand_size (b_mode, sizeflag);
  5745 + }
  5746 + }
4125 5747 oappend ("%es:" + intel_syntax);
4126 5748 ptr_reg (code, sizeflag);
4127 5749 }
... ... @@ -4130,10 +5752,21 @@ static void
4130 5752 OP_DSreg (int code, int sizeflag)
4131 5753 {
4132 5754 if (intel_syntax)
4133   - intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4134   - ? v_mode
4135   - : b_mode,
4136   - sizeflag);
  5755 + {
  5756 + switch (codep[-1])
  5757 + {
  5758 + case 0x6f: /* outsw/outsl */
  5759 + intel_operand_size (z_mode, sizeflag);
  5760 + break;
  5761 + case 0xa5: /* movsw/movsl/movsq */
  5762 + case 0xa7: /* cmpsw/cmpsl/cmpsq */
  5763 + case 0xad: /* lodsw/lodsl/lodsq */
  5764 + intel_operand_size (v_mode, sizeflag);
  5765 + break;
  5766 + default:
  5767 + intel_operand_size (b_mode, sizeflag);
  5768 + }
  5769 + }
4137 5770 if ((prefixes
4138 5771 & (PREFIX_CS
4139 5772 | PREFIX_DS
... ... @@ -4150,9 +5783,9 @@ static void
4150 5783 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4151 5784 {
4152 5785 int add = 0;
4153   - if (rex & REX_EXTX)
  5786 + if (rex & REX_R)
4154 5787 {
4155   - USED_REX (REX_EXTX);
  5788 + USED_REX (REX_R);
4156 5789 add = 8;
4157 5790 }
4158 5791 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
... ... @@ -4160,7 +5793,7 @@ OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4160 5793 used_prefixes |= PREFIX_LOCK;
4161 5794 add = 8;
4162 5795 }
4163   - snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", reg + add);
  5796 + snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
4164 5797 oappend (scratchbuf + intel_syntax);
4165 5798 }
4166 5799  
... ... @@ -4168,27 +5801,27 @@ static void
4168 5801 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4169 5802 {
4170 5803 int add = 0;
4171   - USED_REX (REX_EXTX);
4172   - if (rex & REX_EXTX)
  5804 + USED_REX (REX_R);
  5805 + if (rex & REX_R)
4173 5806 add = 8;
4174 5807 if (intel_syntax)
4175   - snprintf (scratchbuf, sizeof(scratchbuf), "db%d", reg + add);
  5808 + snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
4176 5809 else
4177   - snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", reg + add);
  5810 + snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
4178 5811 oappend (scratchbuf);
4179 5812 }
4180 5813  
4181 5814 static void
4182 5815 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4183 5816 {
4184   - snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", reg);
  5817 + snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
4185 5818 oappend (scratchbuf + intel_syntax);
4186 5819 }
4187 5820  
4188 5821 static void
4189   -OP_Rd (int bytemode, int sizeflag)
  5822 +OP_R (int bytemode, int sizeflag)
4190 5823 {
4191   - if (mod == 3)
  5824 + if (modrm.mod == 3)
4192 5825 OP_E (bytemode, sizeflag);
4193 5826 else
4194 5827 BadOp ();
... ... @@ -4201,13 +5834,13 @@ OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4201 5834 if (prefixes & PREFIX_DATA)
4202 5835 {
4203 5836 int add = 0;
4204   - USED_REX (REX_EXTX);
4205   - if (rex & REX_EXTX)
  5837 + USED_REX (REX_R);
  5838 + if (rex & REX_R)
4206 5839 add = 8;
4207   - snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg + add);
  5840 + snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
4208 5841 }
4209 5842 else
4210   - snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", reg);
  5843 + snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
4211 5844 oappend (scratchbuf + intel_syntax);
4212 5845 }
4213 5846  
... ... @@ -4215,17 +5848,17 @@ static void
4215 5848 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4216 5849 {
4217 5850 int add = 0;
4218   - USED_REX (REX_EXTX);
4219   - if (rex & REX_EXTX)
  5851 + USED_REX (REX_R);
  5852 + if (rex & REX_R)
4220 5853 add = 8;
4221   - snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg + add);
  5854 + snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
4222 5855 oappend (scratchbuf + intel_syntax);
4223 5856 }
4224 5857  
4225 5858 static void
4226 5859 OP_EM (int bytemode, int sizeflag)
4227 5860 {
4228   - if (mod != 3)
  5861 + if (modrm.mod != 3)
4229 5862 {
4230 5863 if (intel_syntax && bytemode == v_mode)
4231 5864 {
... ... @@ -4244,51 +5877,75 @@ OP_EM (int bytemode, int sizeflag)
4244 5877 {
4245 5878 int add = 0;
4246 5879  
4247   - USED_REX (REX_EXTZ);
4248   - if (rex & REX_EXTZ)
  5880 + USED_REX (REX_B);
  5881 + if (rex & REX_B)
4249 5882 add = 8;
4250   - snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", rm + add);
  5883 + snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
4251 5884 }
4252 5885 else
4253   - snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", rm);
  5886 + snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
4254 5887 oappend (scratchbuf + intel_syntax);
4255 5888 }
4256 5889  
  5890 +/* cvt* are the only instructions in sse2 which have
  5891 + both SSE and MMX operands and also have 0x66 prefix
  5892 + in their opcode. 0x66 was originally used to differentiate
  5893 + between SSE and MMX instruction(operands). So we have to handle the
  5894 + cvt* separately using OP_EMC and OP_MXC */
4257 5895 static void
4258   -OP_EX (int bytemode, int sizeflag)
  5896 +OP_EMC (int bytemode, int sizeflag)
4259 5897 {
4260   - int add = 0;
4261   - if (mod != 3)
  5898 + if (modrm.mod != 3)
4262 5899 {
4263 5900 if (intel_syntax && bytemode == v_mode)
4264 5901 {
4265   - switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4266   - {
4267   - case 0: bytemode = x_mode; break;
4268   - case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4269   - case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4270   - case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4271   - default: bytemode = 0; break;
4272   - }
4273   - }
  5902 + bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
  5903 + used_prefixes |= (prefixes & PREFIX_DATA);
  5904 + }
  5905 + OP_E (bytemode, sizeflag);
  5906 + return;
  5907 + }
  5908 +
  5909 + /* Skip mod/rm byte. */
  5910 + MODRM_CHECK;
  5911 + codep++;
  5912 + used_prefixes |= (prefixes & PREFIX_DATA);
  5913 + snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
  5914 + oappend (scratchbuf + intel_syntax);
  5915 +}
  5916 +
  5917 +static void
  5918 +OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
  5919 +{
  5920 + used_prefixes |= (prefixes & PREFIX_DATA);
  5921 + snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
  5922 + oappend (scratchbuf + intel_syntax);
  5923 +}
  5924 +
  5925 +static void
  5926 +OP_EX (int bytemode, int sizeflag)
  5927 +{
  5928 + int add = 0;
  5929 + if (modrm.mod != 3)
  5930 + {
4274 5931 OP_E (bytemode, sizeflag);
4275 5932 return;
4276 5933 }
4277   - USED_REX (REX_EXTZ);
4278   - if (rex & REX_EXTZ)
  5934 + USED_REX (REX_B);
  5935 + if (rex & REX_B)
4279 5936 add = 8;
4280 5937  
4281 5938 /* Skip mod/rm byte. */
4282 5939 MODRM_CHECK;
4283 5940 codep++;
4284   - snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", rm + add);
  5941 + snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
4285 5942 oappend (scratchbuf + intel_syntax);
4286 5943 }
4287 5944  
4288 5945 static void
4289 5946 OP_MS (int bytemode, int sizeflag)
4290 5947 {
4291   - if (mod == 3)
  5948 + if (modrm.mod == 3)
4292 5949 OP_EM (bytemode, sizeflag);
4293 5950 else
4294 5951 BadOp ();
... ... @@ -4297,7 +5954,7 @@ OP_MS (int bytemode, int sizeflag)
4297 5954 static void
4298 5955 OP_XS (int bytemode, int sizeflag)
4299 5956 {
4300   - if (mod == 3)
  5957 + if (modrm.mod == 3)
4301 5958 OP_EX (bytemode, sizeflag);
4302 5959 else
4303 5960 BadOp ();
... ... @@ -4306,8 +5963,9 @@ OP_XS (int bytemode, int sizeflag)
4306 5963 static void
4307 5964 OP_M (int bytemode, int sizeflag)
4308 5965 {
4309   - if (mod == 3)
4310   - BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
  5966 + if (modrm.mod == 3)
  5967 + /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
  5968 + BadOp ();
4311 5969 else
4312 5970 OP_E (bytemode, sizeflag);
4313 5971 }
... ... @@ -4315,7 +5973,7 @@ OP_M (int bytemode, int sizeflag)
4315 5973 static void
4316 5974 OP_0f07 (int bytemode, int sizeflag)
4317 5975 {
4318   - if (mod != 3 || rm != 0)
  5976 + if (modrm.mod != 3 || modrm.rm != 0)
4319 5977 BadOp ();
4320 5978 else
4321 5979 OP_E (bytemode, sizeflag);
... ... @@ -4324,18 +5982,18 @@ OP_0f07 (int bytemode, int sizeflag)
4324 5982 static void
4325 5983 OP_0fae (int bytemode, int sizeflag)
4326 5984 {
4327   - if (mod == 3)
  5985 + if (modrm.mod == 3)
4328 5986 {
4329   - if (reg == 7)
  5987 + if (modrm.reg == 7)
4330 5988 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4331 5989  
4332   - if (reg < 5 || rm != 0)
  5990 + if (modrm.reg < 5 || modrm.rm != 0)
4333 5991 {
4334 5992 BadOp (); /* bad sfence, mfence, or lfence */
4335 5993 return;
4336 5994 }
4337 5995 }
4338   - else if (reg != 7)
  5996 + else if (modrm.reg != 7)
4339 5997 {
4340 5998 BadOp (); /* bad clflush */
4341 5999 return;
... ... @@ -4344,12 +6002,29 @@ OP_0fae (int bytemode, int sizeflag)
4344 6002 OP_E (bytemode, sizeflag);
4345 6003 }
4346 6004  
  6005 +/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
  6006 + 32bit mode and "xchg %rax,%rax" in 64bit mode. */
  6007 +
  6008 +static void
  6009 +NOP_Fixup1 (int bytemode, int sizeflag)
  6010 +{
  6011 + if ((prefixes & PREFIX_DATA) != 0
  6012 + || (rex != 0
  6013 + && rex != 0x48
  6014 + && address_mode == mode_64bit))
  6015 + OP_REG (bytemode, sizeflag);
  6016 + else
  6017 + strcpy (obuf, "nop");
  6018 +}
  6019 +
4347 6020 static void
4348   -NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
  6021 +NOP_Fixup2 (int bytemode, int sizeflag)
4349 6022 {
4350   - /* NOP with REPZ prefix is called PAUSE. */
4351   - if (prefixes == PREFIX_REPZ)
4352   - strcpy (obuf, "pause");
  6023 + if ((prefixes & PREFIX_DATA) != 0
  6024 + || (rex != 0
  6025 + && rex != 0x48
  6026 + && address_mode == mode_64bit))
  6027 + OP_IMREG (bytemode, sizeflag);
4353 6028 }
4354 6029  
4355 6030 static const char *Suffix3DNow[] = {
... ... @@ -4398,7 +6073,7 @@ static const char *Suffix3DNow[] = {
4398 6073 /* A8 */ NULL, NULL, "pfsubr", NULL,
4399 6074 /* AC */ NULL, NULL, "pfacc", NULL,
4400 6075 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4401   -/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
  6076 +/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
4402 6077 /* B8 */ NULL, NULL, NULL, "pswapd",
4403 6078 /* BC */ NULL, NULL, NULL, "pavgusb",
4404 6079 /* C0 */ NULL, NULL, NULL, NULL,
... ... @@ -4438,8 +6113,8 @@ OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4438 6113 of the opcode (0x0f0f) and the opcode suffix, we need to do
4439 6114 all the modrm processing first, and don't know until now that
4440 6115 we have a bad opcode. This necessitates some cleaning up. */
4441   - op1out[0] = '\0';
4442   - op2out[0] = '\0';
  6116 + op_out[0][0] = '\0';
  6117 + op_out[1][0] = '\0';
4443 6118 BadOp ();
4444 6119 }
4445 6120 }
... ... @@ -4489,8 +6164,8 @@ OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4489 6164 else
4490 6165 {
4491 6166 /* We have a bad extension byte. Clean up. */
4492   - op1out[0] = '\0';
4493   - op2out[0] = '\0';
  6167 + op_out[0][0] = '\0';
  6168 + op_out[1][0] = '\0';
4494 6169 BadOp ();
4495 6170 }
4496 6171 }
... ... @@ -4500,7 +6175,7 @@ SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4500 6175 {
4501 6176 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4502 6177 forms of these instructions. */
4503   - if (mod == 3)
  6178 + if (modrm.mod == 3)
4504 6179 {
4505 6180 char *p = obuf + strlen (obuf);
4506 6181 *(p + 1) = '\0';
... ... @@ -4514,7 +6189,7 @@ SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4514 6189 static void
4515 6190 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4516 6191 {
4517   - if (mod == 3 && reg == 1 && rm <= 1)
  6192 + if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
4518 6193 {
4519 6194 /* Override "sidt". */
4520 6195 size_t olen = strlen (obuf);
... ... @@ -4536,12 +6211,12 @@ PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4536 6211 || strncmp (p - 3, "32", 2) == 0))
4537 6212 p -= 7;
4538 6213  
4539   - if (rm)
  6214 + if (modrm.rm)
4540 6215 {
4541 6216 /* mwait %eax,%ecx */
4542 6217 strcpy (p, "mwait");
4543 6218 if (!intel_syntax)
4544   - strcpy (op1out, names[0]);
  6219 + strcpy (op_out[0], names[0]);
4545 6220 }
4546 6221 else
4547 6222 {
... ... @@ -4559,13 +6234,13 @@ PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4559 6234 ? names32 : names16);
4560 6235 used_prefixes |= PREFIX_ADDR;
4561 6236 }
4562   - strcpy (op1out, op1_names[0]);
4563   - strcpy (op3out, names[2]);
  6237 + strcpy (op_out[0], op1_names[0]);
  6238 + strcpy (op_out[2], names[2]);
4564 6239 }
4565 6240 }
4566 6241 if (!intel_syntax)
4567 6242 {
4568   - strcpy (op2out, names[1]);
  6243 + strcpy (op_out[1], names[1]);
4569 6244 two_source_ops = 1;
4570 6245 }
4571 6246  
... ... @@ -4626,7 +6301,7 @@ SVME_Fixup (int bytemode, int sizeflag)
4626 6301 switch (*codep++)
4627 6302 {
4628 6303 case 0xdf:
4629   - strcpy (op2out, names32[1]);
  6304 + strcpy (op_out[1], names32[1]);
4630 6305 two_source_ops = 1;
4631 6306 /* Fall through. */
4632 6307 case 0xd8:
... ... @@ -4676,58 +6351,12 @@ BadOp (void)
4676 6351 }
4677 6352  
4678 6353 static void
4679   -SEG_Fixup (int extrachar, int sizeflag)
4680   -{
4681   - if (mod == 3)
4682   - {
4683   - /* We need to add a proper suffix with
4684   -
4685   - movw %ds,%ax
4686   - movl %ds,%eax
4687   - movq %ds,%rax
4688   - movw %ax,%ds
4689   - movl %eax,%ds
4690   - movq %rax,%ds
4691   - */
4692   - const char *suffix;
4693   -
4694   - if (prefixes & PREFIX_DATA)
4695   - suffix = "w";
4696   - else
4697   - {
4698   - USED_REX (REX_MODE64);
4699   - if (rex & REX_MODE64)
4700   - suffix = "q";
4701   - else
4702   - suffix = "l";
4703   - }
4704   - strcat (obuf, suffix);
4705   - }
4706   - else
4707   - {
4708   - /* We need to fix the suffix for
4709   -
4710   - movw %ds,(%eax)
4711   - movw %ds,(%rax)
4712   - movw (%eax),%ds
4713   - movw (%rax),%ds
4714   -
4715   - Override "mov[l|q]". */
4716   - char *p = obuf + strlen (obuf) - 1;
4717   -
4718   - /* We might not have a suffix. */
4719   - if (*p == 'v')
4720   - ++p;
4721   - *p = 'w';
4722   - }
4723   -
4724   - OP_E (extrachar, sizeflag);
4725   -}
4726   -
4727   -static void
4728 6354 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4729 6355 {
4730   - if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
  6356 + if (modrm.mod == 3
  6357 + && modrm.reg == 0
  6358 + && modrm.rm >=1
  6359 + && modrm.rm <= 4)
4731 6360 {
4732 6361 /* Override "sgdt". */
4733 6362 char *p = obuf + strlen (obuf) - 4;
... ... @@ -4736,7 +6365,7 @@ VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4736 6365 if (*p == 'g')
4737 6366 --p;
4738 6367  
4739   - switch (rm)
  6368 + switch (modrm.rm)
4740 6369 {
4741 6370 case 1:
4742 6371 strcpy (p, "vmcall");
... ... @@ -4843,3 +6472,90 @@ REP_Fixup (int bytemode, int sizeflag)
4843 6472 break;
4844 6473 }
4845 6474 }
  6475 +
  6476 +static void
  6477 +CMPXCHG8B_Fixup (int bytemode, int sizeflag)
  6478 +{
  6479 + USED_REX (REX_W);
  6480 + if (rex & REX_W)
  6481 + {
  6482 + /* Change cmpxchg8b to cmpxchg16b. */
  6483 + char *p = obuf + strlen (obuf) - 2;
  6484 + strcpy (p, "16b");
  6485 + bytemode = o_mode;
  6486 + }
  6487 + OP_M (bytemode, sizeflag);
  6488 +}
  6489 +
  6490 +static void
  6491 +XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
  6492 +{
  6493 + snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
  6494 + oappend (scratchbuf + intel_syntax);
  6495 +}
  6496 +
  6497 +static void
  6498 +CRC32_Fixup (int bytemode, int sizeflag)
  6499 +{
  6500 + /* Add proper suffix to "crc32". */
  6501 + char *p = obuf + strlen (obuf);
  6502 +
  6503 + switch (bytemode)
  6504 + {
  6505 + case b_mode:
  6506 + if (intel_syntax)
  6507 + break;
  6508 +
  6509 + *p++ = 'b';
  6510 + break;
  6511 + case v_mode:
  6512 + if (intel_syntax)
  6513 + break;
  6514 +
  6515 + USED_REX (REX_W);
  6516 + if (rex & REX_W)
  6517 + *p++ = 'q';
  6518 + else if (sizeflag & DFLAG)
  6519 + *p++ = 'l';
  6520 + else
  6521 + *p++ = 'w';
  6522 + used_prefixes |= (prefixes & PREFIX_DATA);
  6523 + break;
  6524 + default:
  6525 + oappend (INTERNAL_DISASSEMBLER_ERROR);
  6526 + break;
  6527 + }
  6528 + *p = '\0';
  6529 +
  6530 + if (modrm.mod == 3)
  6531 + {
  6532 + int add;
  6533 +
  6534 + /* Skip mod/rm byte. */
  6535 + MODRM_CHECK;
  6536 + codep++;
  6537 +
  6538 + USED_REX (REX_B);
  6539 + add = (rex & REX_B) ? 8 : 0;
  6540 + if (bytemode == b_mode)
  6541 + {
  6542 + USED_REX (0);
  6543 + if (rex)
  6544 + oappend (names8rex[modrm.rm + add]);
  6545 + else
  6546 + oappend (names8[modrm.rm + add]);
  6547 + }
  6548 + else
  6549 + {
  6550 + USED_REX (REX_W);
  6551 + if (rex & REX_W)
  6552 + oappend (names64[modrm.rm + add]);
  6553 + else if ((prefixes & PREFIX_DATA))
  6554 + oappend (names16[modrm.rm + add]);
  6555 + else
  6556 + oappend (names32[modrm.rm + add]);
  6557 + }
  6558 + }
  6559 + else
  6560 + OP_E (bytemode, sizeflag);
  6561 +}
... ...