FdfloatingpointdestinationregisterFnfloatingpointsourceregisterFmfloatingpointsourceregisterorfloatingpointconstantuvtransferlength(TABLE1)wxregistercount(TABLE2)abcdarithmeticopcode(TABLES3&4)efdestinationsize(roundingprecision)(TABLE5)ghroundingmode(TABLE6)jdyadic/monadicbit:0=dyadic,1=monadiciconstantbit:1=constant(TABLE6)*//*TABLE1+-------------------------+---+---+---------+---------+|Precision|u|v|FPSR.EP|length|+-------------------------+---+---+---------+---------+|Single|0ü0|x|1words||Double|1ü1|x|2words||Extended|1ü1|x|3words||Packeddecimal|1ü1|0|3words||Expandedpackeddecimal|1ü1|1|4words|+-------------------------+---+---+---------+---------+Note:x=don'tcare*//*TABLE2+---+---+---------------------------------+|w|x|Numberofregisterstotransfer|+---+---+---------------------------------+|0ü1|1||1ü0|2||1ü1|3||0ü0|4|+---+---+---------------------------------+*//*TABLE3:DyadicFloatingPointOpcodes+---+---+---+---+----------+-----------------------+-----------------------+|a|b|c|d|Mnemonic|Description|Operation|+---+---+---+---+----------+-----------------------+-----------------------+|0|0|0|0|ADF|Add|Fd:=Fn+Fm||0|0|0|1|MUF|Multiply|Fd:=Fn*Fm||0|0|1|0|SUF|Subtract|Fd:=Fn-Fm||0|0|1|1|RSF|Reversesubtract|Fd:=Fm-Fn||0|1|0|0|DVF|Divide|Fd:=Fn/Fm||0|1|0|1|RDF|Reversedivide|Fd:=Fm/Fn||0|1|1|0|POW|Power|Fd:=Fn^Fm||0|1|1|1|RPW|Reversepower|Fd:=Fm^Fn||1|0|0|0|RMF|Remainder|Fd:=IEEErem(Fn/Fm)||1|0|0|1|FML|FastMultiply|Fd:=Fn*Fm||1|0|1|0|FDV|FastDivide|Fd:=Fn/Fm||1|0|1|1|FRD|Fastreversedivide|Fd:=Fm/Fn||1|1|0|0|POL|Polarangle(ArcTan2)|Fd:=arctan2(Fn,Fm)||1|1|0|1||undefinedinstruction|trap||1|1|1|0||undefinedinstruction|trap||1|1|1|1||undefinedinstruction|trap|+---+---+---+---+----------+-----------------------+-----------------------+Note:POW,RPW,POLaredeprecated,andareavailableforbackwardscompatibilityonly.*//*TABLE4:MonadicFloatingPointOpcodes+---+---+---+---+----------+-----------------------+-----------------------+|a|b|c|d|Mnemonic|Description|Operation|+---+---+---+---+----------+-----------------------+-----------------------+|0|0|0|0|MVF|Move|Fd:=Fm||0|0|0|1|MNF|Movenegated|Fd:=-Fm||0|0|1|0|ABS|Absolutevalue|Fd:=abs(Fm)||0|0|1|1|RND|Roundtointeger|Fd:=int(Fm)||0|1|0|0|SQT|Squareroot|Fd:=sqrt(Fm)||0|1|0|1|LOG|Logbase10|Fd:=log10(Fm)||0|1|1|0|LGN|Logbasee|Fd:=ln(Fm)||0|1|1|1|EXP|Exponent|Fd:=e^Fm||1|0|0|0|SIN|Sine|Fd:=sin(Fm)||1|0|0|1|COS|Cosine|Fd:=cos(Fm)||1|0|1|0|TAN|Tangent|Fd:=tan(Fm)||1|0|1|1|ASN|ArcSine|Fd:=arcsin(Fm)||1|1|0|0|ACS|ArcCosine|Fd:=arccos(Fm)||1|1|0|1|ATN|ArcTangent|Fd:=arctan(Fm)||1|1|1|0|URD|Unnormalizedround|Fd:=int(Fm)||1|1|1|1|NRM|Normalize|Fd:=norm(Fm)|+---+---+---+---+----------+-----------------------+-----------------------+Note:LOG,LGN,EXP,SIN,COS,TAN,ASN,ACS,ATNaredeprecated,andareavailableforbackwardscompatibilityonly.*//*TABLE5+-------------------------+---+---+|RoundingPrecision|e|f|+-------------------------+---+---+|IEEESingleprecision|0ü0||IEEEDoubleprecision|0ü1||IEEEExtendedprecision|1ü0||undefined(trap)|1ü1|+-------------------------+---+---+*//*TABLE5+---------------------------------+---+---+|RoundingMode|g|h|+---------------------------------+---+---+|Roundtonearest(default)|0ü0||Roundtowardplusinfinity|0ü1||Roundtowardnegativeinfinity|1ü0||Roundtowardzero|1ü1|+---------------------------------+---+---+*//*======Definitionsforloadandstoreinstructions===*//* bit masks */#defineBIT_PREINDEX0x01000000#defineBIT_UP0x00800000#defineBIT_WRITE_BACK0x00200000#defineBIT_LOAD0x00100000/* masks for load/store */#defineMASK_CPDT0x0c000000/* data processing opcode */#defineMASK_OFFSET0x000000ff#defineMASK_TRANSFER_LENGTH0x00408000#defineMASK_REGISTER_COUNTMASK_TRANSFER_LENGTH#defineMASK_COPROCESSOR0x00000f00/* Tests for transfer length */#defineTRANSFER_SINGLE0x00000000#defineTRANSFER_DOUBLE0x00008000#defineTRANSFER_EXTENDED0x00400000#defineTRANSFER_PACKEDMASK_TRANSFER_LENGTH/* Get the coprocessor number from the opcode. */#definegetCoprocessorNumber(opcode)((opcode&MASK_COPROCESSOR)>>8)/* Get the offset from the opcode. */#definegetOffset(opcode)(opcode&MASK_OFFSET)/* Tests for specific data transfer load/store opcodes. */#defineTEST_OPCODE(opcode,mask)(((opcode)&(mask))==(mask))#defineLOAD_OP(opcode)TEST_OPCODE((opcode),MASK_CPDT|BIT_LOAD)#defineSTORE_OP(opcode)((opcode&(MASK_CPDT|BIT_LOAD))==MASK_CPDT)#defineLDF_OP(opcode)(LOAD_OP(opcode)&&(getCoprocessorNumber(opcode)==1))#defineLFM_OP(opcode)(LOAD_OP(opcode)&&(getCoprocessorNumber(opcode)==2))#defineSTF_OP(opcode)(STORE_OP(opcode)&&(getCoprocessorNumber(opcode)==1))#defineSFM_OP(opcode)(STORE_OP(opcode)&&(getCoprocessorNumber(opcode)==2))#definePREINDEXED(opcode)((opcode&BIT_PREINDEX)!=0)#definePOSTINDEXED(opcode)((opcode&BIT_PREINDEX)==0)#defineBIT_UP_SET(opcode)((opcode&BIT_UP)!=0)#defineBIT_UP_CLEAR(opcode)((opcode&BIT_DOWN)==0)#defineWRITE_BACK(opcode)((opcode&BIT_WRITE_BACK)!=0)#defineLOAD(opcode)((opcode&BIT_LOAD)!=0)#defineSTORE(opcode)((opcode&BIT_LOAD)==0)/*======Definitionsforarithmeticinstructions===*//* bit masks */#defineBIT_MONADIC0x00008000#defineBIT_CONSTANT0x00000008#defineCONSTANT_FM(opcode)((opcode&BIT_CONSTANT)!=0)#defineMONADIC_INSTRUCTION(opcode)((opcode&BIT_MONADIC)!=0)/* instruction identification masks */#defineMASK_CPDO0x0e000000/* arithmetic opcode */#defineMASK_ARITHMETIC_OPCODE0x00f08000#defineMASK_DESTINATION_SIZE0x00080080/* dyadic arithmetic opcodes. */#defineADF_CODE0x00000000#defineMUF_CODE0x00100000#defineSUF_CODE0x00200000#defineRSF_CODE0x00300000#defineDVF_CODE0x00400000#defineRDF_CODE0x00500000#definePOW_CODE0x00600000#defineRPW_CODE0x00700000#defineRMF_CODE0x00800000#defineFML_CODE0x00900000#defineFDV_CODE0x00a00000#defineFRD_CODE0x00b00000#definePOL_CODE0x00c00000/* 0x00d00000 is an invalid dyadic arithmetic opcode *//* 0x00e00000 is an invalid dyadic arithmetic opcode *//* 0x00f00000 is an invalid dyadic arithmetic opcode *//* monadic arithmetic opcodes. */#defineMVF_CODE0x00008000#defineMNF_CODE0x00108000#defineABS_CODE0x00208000#defineRND_CODE0x00308000#defineSQT_CODE0x00408000#defineLOG_CODE0x00508000#defineLGN_CODE0x00608000#defineEXP_CODE0x00708000#defineSIN_CODE0x00808000#defineCOS_CODE0x00908000#defineTAN_CODE0x00a08000#defineASN_CODE0x00b08000#defineACS_CODE0x00c08000#defineATN_CODE0x00d08000#defineURD_CODE0x00e08000#defineNRM_CODE0x00f08000/*======Definitionsforregistertransferandcomparisoninstructions===*/#defineMASK_CPRT0x0e000010/* register transfer opcode */#defineMASK_CPRT_CODE0x00f00000#defineFLT_CODE0x00000000#defineFIX_CODE0x00100000#defineWFS_CODE0x00200000#defineRFS_CODE0x00300000#defineWFC_CODE0x00400000#defineRFC_CODE0x00500000#defineCMF_CODE0x00900000#defineCNF_CODE0x00b00000#defineCMFE_CODE0x00d00000#defineCNFE_CODE0x00f00000/*======Commondefinitions===*//* register masks */#defineMASK_Rd0x0000f000#defineMASK_Rn0x000f0000#defineMASK_Fd0x00007000#defineMASK_Fm0x00000007#defineMASK_Fn0x00070000/* condition code masks */#defineCC_MASK0xf0000000#defineCC_NEGATIVE0x80000000#defineCC_ZERO0x40000000#defineCC_CARRY0x20000000#defineCC_OVERFLOW0x10000000#defineCC_EQ0x00000000#defineCC_NE0x10000000#defineCC_CS0x20000000#defineCC_HSCC_CS#defineCC_CC0x30000000#defineCC_LOCC_CC#defineCC_MI0x40000000#defineCC_PL0x50000000#defineCC_VS0x60000000#defineCC_VC0x70000000#defineCC_HI0x80000000#defineCC_LS0x90000000#defineCC_GE0xa0000000#defineCC_LT0xb0000000#defineCC_GT0xc0000000#defineCC_LE0xd0000000#defineCC_AL0xe0000000#defineCC_NV0xf0000000/* rounding masks/values */#defineMASK_ROUNDING_MODE0x00000060#defineROUND_TO_NEAREST0x00000000#defineROUND_TO_PLUS_INFINITY0x00000020#defineROUND_TO_MINUS_INFINITY0x00000040#defineROUND_TO_ZERO0x00000060#defineMASK_ROUNDING_PRECISION0x00080080#defineROUND_SINGLE0x00000000#defineROUND_DOUBLE0x00000080#defineROUND_EXTENDED0x00080000/* Get the condition code from the opcode. */#definegetCondition(opcode)(opcode>>28)/* Get the source register from the opcode. */#definegetRn(opcode)((opcode&MASK_Rn)>>16)/* Get the destination floating point register from the opcode. */#definegetFd(opcode)((opcode&MASK_Fd)>>12)/* Get the first source floating point register from the opcode. */#definegetFn(opcode)((opcode&MASK_Fn)>>16)/* Get the second source floating point register from the opcode. */#definegetFm(opcode)(opcode&MASK_Fm)/* Get the destination register from the opcode. */#definegetRd(opcode)((opcode&MASK_Rd)>>12)/* Get the rounding mode from the opcode. */#definegetRoundingMode(opcode)((opcode&MASK_ROUNDING_MODE)>>5)